ST20-C1 STMICROELECTRONICS [STMicroelectronics], ST20-C1 Datasheet - Page 77

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ST20-C1

Manufacturer Part Number
ST20-C1
Description
Instruction Set Reference Manual
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
The code of the exception handler may access or modify the state of the interrupted or
trapped process. The state of the interrupted or trapped process is stored in the
exception control block, which is located at the initial Wptr of the exception handler.
An exception handler must use eret to return to the interrupted or trapped process.
6.8.1
When the exception handler has been created and initialized, the exception can be
enabled. The address of the exception handler control block, ORed with 1 to set the
exception type bit, must be written in the exception vector table at the level for the
exception. To write an entry control_block with type ExceptionProcessType in the
exception vector table, the following code may be used:
For interrupts, both the global_interrupt_enable and local_interrupt_enable bits in the
status register must be set. In addition the interrupt controller may need to be initial-
ized, including any interrupt enable bits and masks.
A trap can be disabled by writing NotProcess into the exception vector table.
Interrupts can be disabled in four ways:
1
2
3
4
Enabling and disabling exceptions
ld control_block; ldc ExceptionProcessType; or;
ld ExceptionBase;
stnl exception_level;
Clearing the status register bit global_interrupt_enable disables all interrupts
until the bit is set by an explicit write to the status register.
Clearing the status register bit local_interrupt_enable disables all interrupts
until the current process is descheduled.
A single exception level can be disabled by writing NotProcess into the excep-
tion vector table.
The interrupt controller will generally have a means of disabling interrupts indi-
vidually or globally by writing to interrupt controller registers.
6 Exceptions
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