ST20-C1 STMICROELECTRONICS [STMicroelectronics], ST20-C1 Datasheet - Page 23

• Manufacturer Part Number: ST20-C1
• Description: Instruction Set Reference Manual
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

The instructions to use the status register are described in section 4.12.
3.3.3
All programs need somewhere to store local working data, e.g. local variables in the
application code. In the ST20 architecture, this local storage is termed the work space
of the program.
The Wptr register is the local work space pointer, which holds the address of the stack
of the executing process. The stack is downward pointing, so space is allocated by
moving the Wptr to a lower address. This address is word aligned and therefore has
the two least significant bits set to zero. When a process is descheduled, the Wptr is
stored as part of the process descriptor block, which is pointed to by Tdesc.
The Wptr is used as a base for addressing local variables. A word offset from the
Wptr is the operand for the instructions ldl (load local), stl (store local) and ldlp (load
local pointer).
The ST20-C1 simplifies the nor mal stack scheme by decoupling the load/store action
from the pointer update:
chain. In addition, they allow for saturated arithmetic to be implemented rela-
tively easily.
A (non-sticky) carry bit is provided to allow efficient implementation of long
addition and subtraction. The carry bit is only manipulated by the addc and
subc instructions allowing the other add instructions to be used in address for-
mation of multi-word values where carry propagation is required so that the
carry is not lost in the address formation evaluations.
The user_mode bit indicates when the machine is handling a user process,
i.e. a process which is not an exception handler. The interrupt_mode bit indi-
cates when the machine is handling an interrupt, or a trap from an interrupt
handler and the trap_mode bit indicates when the machine is executing a trap
handler. An operating system may need to distinguish between modes to allow
it to perform scheduling activities from a trap handler. These bits are also
required to enable the eret instruction to determine whether a signal to the
interrupt controller is required.
The sleep bit indicates that the CPU is due to go to sleep, i.e. to turn off its
clocks and go into low power mode. This bit is set when the CPU detects there
is no user process to execute and is cleared when the CPU goes to sleep.
The start_next_task bit when set causes the processor to attempt to run the
next process from the scheduling queue.
The timeslice_enable bit and timeslice_count field are used for timeslicing,
as described in section 7.4.
The work space pointer
Load-local and store-local instructions access values in the work space with
addresses relative to the Wptr, but do not change the value of Wptr.
Separate instructions ( ajw , gajw ) are provided to update the work space
3 Architecture
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