ST20-C1 STMICROELECTRONICS [STMicroelectronics], ST20-C1 Datasheet - Page 24

• Manufacturer Part Number: ST20-C1
• Description: Instruction Set Reference Manual
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

3.4 Instruction encoding
On calling a function or procedure, the Wptr is normally decreased to a lower address
to allocate space for the parameters and local variables of the function. This is
performed using the instruction ajw . The Wptr is returned to its initial value before
returning from the function to free the local work space.
3.3.4
The task descriptor Tdesc points to the process descriptor block for the currently
executing process. The value held in the Tdesc becomes the process identifier when
the process is not executing.
The process descriptor block is a block of memory whose contents depend on the
state of the process. It will generally hold the saved Wptr and Iptr for the process, and
may hold a link to the next process if the process is in a queue of waiting processes.
The process descriptor block is described in section 7.2.
3.3.5
The bits of the IOreg are mapped to external connections on the ST20-C1 core. They
may be used to signal to, or read signals from, peripherals on or off chip. The io
instruction is used to read and write to the IOreg and is described in section 4.11. The
IOreg is global, and remains unchanged by any context switch. The bits of the IOreg
are defined in Table 3.3.
In some ST20 variants, some bits of the IO register may be reserved for system use.
The reserved bits will be the most significant bits of the appropr iate half word. The
number of any such bits is given in the data sheet for each variant.
3.4
The ST20-C1 is a zero-address machine. Instruction operands are always implicit and
no bits are needed in the instruction representation to carry address or operand
location information. This results in very short instructions and exceptionally high code
density.
The instruction encoding is designed so that the most commonly executed instructions
occupy the least number of bytes. This reduces the size of the code, which saves
memory and reduces the memory bandwidth needed for instruction fetching. This
section describes the encoding mechanism.
A sequence of single byte instruction components is used to encode an instruction.
The ST20 interprets this sequence at the instruction fetch stage of execution. Most
24/205
pointer by any amount in one step without needing a series of increments or
decrements.
The task descriptor
IO register
Instruction encoding
0-15
16-31
Bits
Output data
Input data
Table 3.3 IOreg bits
Purpose