cx28348 Mindspeed Technologies, cx28348 Datasheet - Page 64
cx28348
Manufacturer Part Number
cx28348
Description
Dual/triple/quad/hex/octal-enhanced Ds3/e3 Framer
Manufacturer
Mindspeed Technologies
Datasheet
1.CX28348.pdf
(195 pages)
- Current page: 64 of 195
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Functional Description
2.1.2
2.1.2.1
2-18
Alarm Signal Generation
Each one of the framers is provided with an alarm signal generation mechanism.
Some of the alarms can be either generated automatically as a reaction to receive
conditions or initiated by the user (set by bits, inserted via external interface or with
the data stream). All alarm signals that are initiated by the user are implemented as an
activate/deactivate mechanism in which the user is responsible for activating and
deactivating the alarm signal generation bit. The alarms that can be generated are
specified for each available mode of operation.
For all DS3/E3 modes of operation bits, TxAlm1 and TxAlm0 in the Mode (i) Control
register are responsible for alarm generation.
During alarm generation and transmission, the system interface is not influenced, thus
all clocks and signals remain the same.
Loss of Signal Generation
For all modes of operation, the transmit mechanism provides the user with a
programmable option to transmit LOS to the line side by setting bit TxLOS at the
Feature2 Control register. When bit TxLOS is set to 1, the transmit mechanism
generates 0 on the line side data interface outputs (TXPOS and TXNEG are
transmitted as 0)—regardless of inserted payload and Overhead bit settings.
Mindspeed Technologies™
CX28342/3/4/6/8 Data Sheet
28348-DSH-001-B
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