ppc440epx-nta667t ETC-unknow, ppc440epx-nta667t Datasheet - Page 73

• Manufacturer Part Number: ppc440epx-nta667t
• Description: Mpu 440epx Risc 32-bit 0.13um 667mhz 1.8v/2.5v/3.3v 680-pin Tebga Tray
• Manufacturer: ETC-unknow

Revision 1.30 – February 27, 2009
Spread Spectrum Clocking
Care must be taken when using a spread spectrum clock generator (SSCG) with the PPC440EPx. This controller
uses a PLL for clock generation inside the chip. The accuracy with which the PLL follows the SSCG is referred to
as tracking skew. The PLL bandwidth and phase angle determine how much tracking skew there is between the
SSCG and the PLL for a given frequency deviation and modulation frequency. When using an SSCG with the
PPC440EPx the following conditions must be met:
Notes:
Important:
requirements and does not adversely affect other aspects of the system.
AMCC Proprietary
Data Sheet
• The frequency deviation must not violate the minimum clock cycle time. Therefore, when operating the
• The maximum frequency deviation of SysClk cannot exceed −1%, and the modulation frequency cannot
PPC440EPx with one or more internal clocks at their maximum supported frequency, the SSCG can only lower
the frequency.
exceed 40kHz. In some cases, on-board PPC440EPx peripherals impose more stringent requirements.
1. The serial port baud rates are synchronous to the modulated clock. The serial port has a tolerance of
2. Ethernet operation is unaffected.
3. IIC operation is unaffected.
approximately 1.5% on baud rate before framing errors begin to occur. The 1.5% tolerance assumes that
the connected device is running at precise baud rates.
It is up to the system designer to ensure that any SSCG used with the PPC440EPx meets the above
440EPx – PPC440EPx Embedded Processor
73