ppc440epx-nta667t ETC-unknow, ppc440epx-nta667t Datasheet - Page 72

• Manufacturer Part Number: ppc440epx-nta667t
• Description: Mpu 440epx Risc 32-bit 0.13um 667mhz 1.8v/2.5v/3.3v 680-pin Tebga Tray
• Manufacturer: ETC-unknow

440EPx – PPC440EPx Embedded Processor
Table 18. Clocking Specifications (continued)
Note:
Figure 5. Timing Waveform
Note:
72
Processor (CPU) Clock
MemClkOut and PLB Clock
MAL Clock
1. SysClk supports spread spectrum clocking with a -1% down-spread and a 40 kHz or less modulation frequency. For a 33.33MHz minimum
2. The maximum input cycle-to-cycle jitter is ± 100 ps within the frequency range 100 kHz to 20 MHz. Outside the frequency range of 100 kHz
3. Slew rate is measured between 0.7V and 1.7V.
SysClk, the modulation frequency range of 33.00 MHz to 33.33 MHz is supported.
to 20 MHz, the maximum input cycle-to-cycle jitter is ± 150 ps.
Symbol
SysClk and GMCRefClk are 2.5V (3.3V tolerant). Slew rate should be measured between 0.7V and 1.7V.
T
F
T
F
T
F
T
CH
C
C
C
C
C
C
Frequency
Period
Frequency
Period
High time
Frequency
Period
Parameter
T
CH
45% of nominal
333.33
133.33
period
Min
1.5
45
12
6
T
C
55% of nominal
666.66
166.66
period
83.33
Max
22.2
7.5
3
T
CL
Revision 1.30 – February 27, 2009
Units
MHz
MHz
MHz
ns
ns
ns
ns
Data Sheet
AMCC Proprietary
0.7V (0.8V)
1.7V (2.0V)
Notes