m470l2923bn0-ca2 Samsung Semiconductor, Inc., m470l2923bn0-ca2 Datasheet
m470l2923bn0-ca2
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m470l2923bn0-ca2 Summary of contents
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... Unbuffered SODIMM DDR SDRAM Unbuffered Module 184pin Unbuffered Module based on 512Mb B-die 66 TSOP-II & 54 sTSOP-II INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY ...
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... DC Operating Conditions............................................................................................................ 9 9.0 DDR SDRAM IDD spec table ..................................................................................................... 10 9.1 M470L3324BT(U)0 [ (32M x 16 256MB Non ECC Module ] 9.2 M470L6524BT(U)0 [ (32M x 16 512MB Non ECC Module ] 9.3 M470L2923BN(V)0 [ (64M 16, 1GB Non ECC Module ] 10.0 AC Operating Conditions........................................................................................................ 12 11.0 Input/Output Capacitance ....................................................................................................... 12 12.0 AC Timming Parameters & Specifications ............................................................................ 13 13.0 System Characteristics for DDR SDRAM .............................................................................. 14 14 ...
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... Revision History Revision Month Year 1.0 February 2003 1.1 June 2003 1.2 July 2003 1.3 October 2003 1.4 March 2004 1.5 June 2005 - First release - Updated DC characteristics. - Corrected Pin configuration table. - Corrected typo in physical module dimenstion - Corrected package dimension. - Changed master format DDR SDRAM History Rev. 1.5 June 2005 ...
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Unbuffered SODIMM 200Pin Unbuffered SODIMM based on 512Mb B-die (x8, x16) 1.0 Ordering Information Part Number M470L3324BT(U)0-C(L)CC/B3/A2/B0 M470L6524BT(U)0-C(L)CC/B3/A2/B0 M470L2923BN(V)0-C(L)CC/B3/A2/B0 Note : Leaded and Lead-free(Pb-free) can be discriminated by PKG P TSOP with Leaded, U ...
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... DQS4 Note : These pins are not used in this module. 2. Pins 71, 72, 73, 74, 77, 78, 79, 80, 83, 84 are not used on x64(M470~ ) module, & used on x72(M485 ~ ) module. 3. Pins 95,122 are NC for 1Row module & used for 2Row moule(M470L6524B). 5.0 Pin Description Pin Name A0 ~ A12 ...
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... Unbuffered SODIMM 6.0 Functional Block Diagram 6.1 256MB, 32M x 64 Non ECC Module (M470L3324BT(U)0) (Populated as 1 bank of x16 DDR SDRAM Module) CS0 DQS0 LDQS CS DM0 LDM I/0 11 DQS1 UDQS ...
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... Unbuffered SODIMM 6.2 512MB, 64M x 64 Non ECC Module (M470L6524BT(U)0) (Populated as 2 bank of x16 DDR SDRAM Module) CS1 CS0 DQS0 LDQS CS DM0 LDM I/0 8 DQS1 UDQS DM1 UDM ...
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... Unbuffered SODIMM 6.3 1GB, 128M x 64 Non ECC Module (M470L2923BN(V)0) (Populated as 2 bank of x8 DDR SDRAM Module) CS0 DQS0 DM0 DM CS DQ0 I/O 0 I/O 0 DQ1 I/O 1 I/O 1 DQ2 I DQ3 I/O 3 I/O 3 I/O 4 I/O 4 DQ4 I/O 5 I/O 5 DQ5 DQ6 I/O 6 I/O 6 I/O 7 I/O 7 DQ7 DQS1 DM1 ...
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Unbuffered SODIMM 7.0 Absolute Maximum Ratings Parameter Voltage on any pin relative Voltage on V & V supply relative DDQ Storage temperature Power dissipation Short circuit current Note : Permanent device ...
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... IDD4R 1,320 IDD4W 1,520 IDD5 1,460 Normal 40 IDD6 Low power 24 IDD7A 2,200 * Module IDD was calculated on the basis of component IDD and can be differently measured according to DQ loading cap. 500 440 620 560 20 20 120 120 100 80 120 120 200 200 ...
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... IDD4R 2,360 IDD4W 2,680 IDD5 2,880 Normal 80 IDD6 Low power 48 IDD7A 4,200 * Module IDD was calculated on the basis of component IDD and can be differently measured according to DQ loading cap. 1,400 1,280 1,600 1,480 80 80 480 480 400 400 480 480 800 ...
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Unbuffered SODIMM 10.0 AC Operating Conditions Parameter/Condition Input High (Logic 1) Voltage, DQ, DQS and DM signals Input Low (Logic 0) Voltage, DQ, DQS and DM signals. Input Differential Voltage, CK and CK inputs Input Crossing Point ...
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Unbuffered SODIMM 12.0 AC Timming Parameters & Specifications Parameter Row cycle time Refresh row cycle time Row active time RAS to CAS delay Row precharge time Row active to Row active delay Write recovery time Last data ...
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Unbuffered SODIMM 13.0 System Characteristics for DDR SDRAM The following specification parameters are required in systems using DDR333, DDR266 devices to ensure proper system performance. these characteristics are for system simulation purposes and are guaranteed by design. ...
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Unbuffered SODIMM 14.0 Component Notes 1. All voltages referenced to Vss. 2. Tests for ac timing, IDD, and electrical, ac and dc characteristics, may be conducted at nominal reference/supply voltage levels, but the related speci- fications and ...
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Unbuffered SODIMM 15.0 System Notes: a. Pullup slew rate is characteristized under the test conditions as shown in Figure 2. b. Pulldown slew rate is measured under the test conditions shown in Figure 3. c. Pullup slew ...
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Unbuffered SODIMM 16.0 Command Truth Table COMMAND Register Extended MRS Register Mode Register Set Auto Refresh Entry Refresh Self Refresh Bank Active & Row Addr. Auto Precharge Disable Read & Column Address Auto Precharge Enable Auto Precharge ...
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Unbuffered SODIMM 17.0 Physical Dimensions 17.1 32M x 64 (M470L3324BT(U)) ± 0.16 0.039 ± (4.00 0.10) 1 0.086 0.456 2.15 11.40 0.07 (1.8+/-0.1) 0.098 2.45 2 0.150 Max (3.80 Max) ± 0.04 0.0039 ± (1.00 0.10) Tolerances ...
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Unbuffered SODIMM 17.2 64Mx64 (M470L6524BT(U)) ± 0.16 0.039 ± (4.00 0.10) 1 0.086 0.456 2.15 11.40 0.07 (1.8+/-0.1) 0.098 2.45 2 0.150 Max (3.80 Max) ± 0.04 0.0039 ± (1.00 0.10) Tolerances : ±.006(.15) unless otherwise specified ...
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Unbuffered SODIMM 17.3 128Mx64 (M4702923BN(V)) ± 0.16 0.039 ± (4.00 0.10) 1 0.086 0.456 2.15 11.40 0.07 (1.8) 0.098 2.45 2 0.150 Max (3.80 Max) ± 0.04 0.0039 ± (1.00 0.10) Tolerances : ±.006(.15) unless otherwise specified ...