ia186xl Innovasic Semiconductor Inc., ia186xl Datasheet - Page 32

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ia186xl

Manufacturer Part Number
ia186xl
Description
16-bit Microcontroller
Manufacturer
Innovasic Semiconductor Inc.
Datasheet

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IA186XL/IA188XL
16-Bit Microcontrollers
Table 8. IA188XL Pin/Signal Descriptions (Continued)
Signal
lcs_n
hlda
hold
int0
int1
int2
int3
int2/inta0_n
int3/inta1_n
Name
lcs_n
hlda
hold
int0
int1
®
PLCC
51
50
45
44
42
41
33
Pin
UNCONTROLLED WHEN PRINTED OR COPIED
PQFP
25
26
31
32
35
36
46
ENG211080711-01
Page 32 of 72
LQFP
42
43
48
49
52
53
63
hold acknowledge. Output. Active High.
When hlda is asserted (high), it indicates that
the IA186XL has relinquished control of the
local bus to another bus master in response to
a HOLD request (see next table entry).
When hlda is asserted, the IA186XL data bus
and control signals are floated allowing
another bus master to drive the signals
directly.
hold. Input. Active High. This signal is a
request indicating that an external bus master
wishes to gain control of the local bus. The
IA186XL will relinquish control of the local bus
between instruction boundaries not
conditioned by a LOCK prefix.
interrupt N (N = 04). Input/Output. Active
High. These maskable inputs interrupt
program flow and cause execution to continue
at an interrupt vector of a specific interrupt
type as follows:
To allow interrupt expansion, int0 and int1
can be used with the interrupt acknowledge
signals inta0_n and inta1_n (see next table
entries) to serve as external interrupt inputs or
interrupt acknowledge outputs.
lower chip select. Output. Active Low. This
pin provides a chip select signal that will be
asserted (low) whenever the address of a
memory bus cycle is within the address space
programmed for that output.
int0: Type 12
int1: Type 13
int2: Type 14
int3: Type 15
Description
Preliminary Data Sheet
September 30, 2008
http://www.Innovasic.com
Customer Support:
1-888-824-4184

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