ox16cf950 ETC-unknow, ox16cf950 Datasheet - Page 32

• Manufacturer Part Number: ox16cf950
• Description: Cost Asynchronous Card
• Manufacturer: ETC-unknow

6.6
The serial interrupt on the OXCF950 is routed through to
the OXCF950 interrupt control, regardless of MCR[3].
6.6.1
Serial channel interrupts are enabled using the Interrupt
Enable Register (‘IER’).
IER[0]: Receiver data available interrupt mask
logic 0
logic 1
IER[1]: Transmitter empty interrupt mask
logic 0
logic 1
IER[2]: Receiver status interrupt
Normal mode:
logic 0
logic 1
9-bit data mode:
logic 0
logic 1
In 9 -bit mode (i.e. when NMR[0] is set) reception of a
character with the address-bit (9
level 1 interrupt if IER[2] is set.
IER[3]: Modem status interrupt mask
logic 0
logic 1
IER[4]: Sleep mode
logic 0
logic 1
Sleep mode is described in section 6.6.4 .
IER[5]: Special character interrupt mask or alternate
sleep mode
9-bit data framing mode:
logic 0
logic 1
In 9 -bit data mode, The receiver can detect up to four
special characters programmed in Special Character 1 to
4. When IER[5] is set, a level 5 interrupt is asserted when a
match is detected.
OXFORD SEMICONDUCTOR LTD.
Interrupts & Sleep Mode
Enable the receiver ready interrupt.
Disable the transmitter empty interrupt.
Enable the transmitter empty interrupt.
Interrupt Enable Register ‘IER’
Disable the receiver ready interrupt.
Disable the receiver status interrupt.
Enable the receiver status interrupt.
Disable receiver status and address bit
interrupt.
Disable the modem status interrupt.
Enable the modem status interrupt.
Disable sleep mode.
Enable sleep mode whereby the internal clock
of the channel is switched off.
Disable the special character receive interrupt.
Enable the special character receive interrupt.
Enable receiver status and address bit
interrupt.
th
bit) set can generate a
650/950 modes (non-9-bit data framing):
logic 0
logic 1
In 16C650 compatible mode when the device is in
Enhanced mode (EFR[4]=1), this bit enables the detection
of special characters. It enables both the detection of
XOFF characters (when in-band flow control is enabled via
EFR[3:0]) and the detection of the XOFF2 special
character (when enabled via EFR[5]).
750 mode (non-9-bit data framing):
logic 0
logic 1
In 16C750 compatible mode (i.e. non-Enhanced mode),
this bit is used an alternate sleep mode and has the same
effect as IER[4]. (See section 6.6.4)
IER[6]: RTS interrupt mask
logic 0
logic 1
This enable is only operative in Enhanced mode
(EFR[4]=1). In non-Enhanced mode, RTS interrupt is
permanently enabled.
IER[7]: CTS interrupt mask
logic 0
logic 1
This enable is only operative in Enhanced mode
(EFR[4]=1). In non-Enhanced mode, CTS interrupt is
permanently enabled.
Disable the special character receive interrupt.
Enable the special character receive interrupt.
Disable alternate sleep mode.
Enable alternate sleep mode whereby the
internal clock of the channel is switched off.
Disable the RTS interrupt.
Enable the RTS interrupt.
Disable the CTS interrupt.
Enable the CTS interrupt.
OXCF950 DATA SHEET V1.1
Page 32