71m6545h-igtr/f Maxim Integrated Products, Inc., 71m6545h-igtr/f Datasheet - Page 16
71m6545h-igtr/f
Manufacturer Part Number
71m6545h-igtr/f
Description
Metrology Processors
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
1.71M6545H-IGTRF.pdf
(134 pages)
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Data Sheet 71M6545/H
For a poly-phase configuration with neutral current sensing using shunt resistor current sensors and the
71M6xx3 isolated sensors, as shown in
differential input, to be connected to a local shunt (see
local shunt connected to the IADC0-IADC1 input is used to sense the Neutral current. The voltage
sensors (VADC8, VADC9 and VADC10) are also directly connected to the 71M6545/H (see
16
Notes:
1. MUX_DIV[3:0] should be set to 0 while writing the other values in this table, and then set to
2. IN is the optional Neutral Current
TERIDIAN updates the CE code periodically. Please contact your local TERIDIAN representative
to obtain the latest CE code and the associated settings.
Current Sensor Type
Applicable Figures
MUX10_SEL[3:0]
MUX0_SEL[3:0]
MUX1_SEL[3:0]
MUX2_SEL[3:0]
MUX3_SEL[3:0]
MUX4_SEL[3:0]
MUX5_SEL[3:0]
MUX6_SEL[3:0]
MUX7_SEL[3:0]
MUX8_SEL[3:0]
MUX9_SEL[3:0]
MUX_DIV[3:0]
the indicated value before writing the MUXn_SEL[3:0] fields.
FIR_LEN[1:0]
Equation(s)
Mnemonic
PLL_FAST
Using settings for the I/O RAM Mnemonics listed in
those required by the corresponding CE code being used may result in undesirable side
effects and must not be selected by the MPU. Consult your local TERIDIAN representative to
obtain the correct CE code and AFE / MUX settings corresponding to the application.
ADC_DIV
EQU[2:0]
CE Code
I/O RAM
DIFF0_E
DIFF2_E
DIFF4_E
DIFF6_E
RMT2_E
RMT4_E
RMT6_E
PRE_E
Table 2. Required CE Code and Settings for CT Sensors
210C[2:1]
© 2008–2011 Teridian Semiconductor Corporation
Location
2100[7:4]
2105[3:0]
2105[7:4]
2104[3:0]
2104[7:4]
2103[3:0]
2103[7:4]
2102[3:0]
2102[7:4]
2101[3:0]
2101[7:4]
2100[3:0]
2106[7:5]
I/O RAM
210C[4]
210C[5]
210C[6]
210C[7]
2200[5]
2200[4]
2709[3]
2709[4]
2709[5]
2704[5]
Figure
I/O RAM Setting
2, the IADC0-IADC1 input must be configured as a
(Hex)
4 Current Transformers (CTs)
A
1
0
1
7
2
8
4
9
6
0
0
0
0
0
0
0
0
1
1
1
1
0
5
Figure 3
Figure 26
ce43a02
and
Table 1
5
for the shunt connection details). The
Figure 28
Local Sensor IADC2-IADC3
Local Sensor IADC4-IADC5
Local Sensor IADC6-IADC7
Differential IADC0-IADC1
Differential IADC2-IADC3
Differential IADC4-IADC5
Differential IADC6-IADC7
IA*VA + IB*VB + IC*VC
IADC0-IADC1 Gain = 1
Slot 0 is IADC2-IADC3
Slot 2 is IADC4-IADC5
Slot 4 is IADC6-IADC7
Slot 6 is IADC0-IADC1
and
Slot 5 is VADC10
Slots not enabled
(IN – See note 2)
Slot 1 is VADC8
Slot 3 is VADC9
Table 2
Comments
288 cycles
19.66 MHz
See note 1
(VC)
Fast
(VA)
(VB)
(IC)
(IA)
(IB)
that do not match
PDS_6545_009
Figure 23
v1.0
for
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