p89lpc932ba NXP Semiconductors, p89lpc932ba Datasheet - Page 41

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p89lpc932ba

Manufacturer Part Number
p89lpc932ba
Description
P89lpc932 8-bit Microcontroller With Accelerated Two-clock 80c51 Core 8 Kb Flash With 512-byte Data Eeprom And 768-byte Ram
Manufacturer
NXP Semiconductors
Datasheet

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Product data
8.27.1 General description
8.27.2 Features
8.26 Data EEPROM
8.27 Flash program memory
The P89LPC932 has 512 bytes of on-chip Data EEPROM. The Data EEPROM is
SFR based, byte readable, byte writable, and erasable (via row fill and sector fill). The
user can read, write and fill the memory via SFRs and one interrupt. This Data
EEPROM provides 100,000 minimum erase/program cycles for each byte.
After the operation finishes, the hardware will set the EEIF bit, which if enabled will
generate an interrupt. The flag is cleared by software.
The P89LPC932 Flash memory provides in-circuit electrical erasure and
programming. The Flash can be read, erased, or written as bytes. The Sector and
Page Erase functions can erase any Flash sector (1 kB) or page (64 bytes). The Chip
Erase operation will erase the entire program memory. In-System Programming and
standard parallel programming are both available. On-chip erase and write timing
generation contribute to a user-friendly programming interface. The P89LPC932
Flash reliably stores memory contents even after 10,000 erase and program cycles.
The cell is designed to optimize the erase and programming mechanisms. The
P89LPC932 uses V
algorithms.
Byte Mode: In this mode, data can be read and written one byte at a time.
Row Fill: In this mode, the addressed row (64 bytes) is filled with a single value.
The entire row can be erased by writing 00h.
Sector Fill: In this mode, all 512 bytes are filled with a single value. The entire
sector can be erased by writing 00h.
Internal fixed boot ROM, containing low-level In-Application Programming (IAP)
routines
User programs can call these routines to perform In-Application Programming
(IAP).
Default loader providing In-System Programming via the serial port, located in
upper end of user program memory.
Boot vector allows user-provided Flash loader code to reside anywhere in the
Flash memory space, providing flexibility to the user.
Programming and erase over the full operating voltage range.
Read/Programming/Erase using ISP/IAP.
Any flash program/erase operation in 2 ms.
Parallel programming with industry-standard commercial programmers.
Programmable security for the code in the Flash for each sector.
100,000 typical erase/program cycles for each byte.
10 year minimum data retention.
Rev. 04 — 06 January 2004
DD
8-bit microcontroller with accelerated two-clock 80C51 core
as the supply voltage to perform the Program/Erase
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
P89LPC932
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