p89lpc932ba NXP Semiconductors, p89lpc932ba Datasheet - Page 31

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p89lpc932ba

Manufacturer Part Number
p89lpc932ba
Description
P89lpc932 8-bit Microcontroller With Accelerated Two-clock 80c51 Core 8 Kb Flash With 512-byte Data Eeprom And 768-byte Ram
Manufacturer
NXP Semiconductors
Datasheet

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Product data
8.19.2 Mode 1
8.19.3 Mode 2
8.19.4 Mode 3
8.19.5 Baud rate generator and selection
8.19.6 Framing error
10 bits are transmitted (through TxD) or received (through RxD): a start bit
(logical ‘0’), 8 data bits (LSB first), and a stop bit (logical ‘1’). When data is received,
the stop bit is stored in RB8 in Special Function Register SCON. The baud rate is
variable and is determined by the Timer 1 overflow rate or the Baud Rate Generator
(described in
11 bits are transmitted (through TxD) or received (through RxD): start bit (logical ‘0’),
8 data bits (LSB first), a programmable 9
data is transmitted, the 9
‘1’. Or, for example, the parity bit (P, in the PSW) could be moved into TB8. When
data is received, the 9
while the stop bit is not saved. The baud rate is programmable to either
the CPU clock frequency, as determined by the SMOD1 bit in PCON.
11 bits are transmitted (through TxD) or received (through RxD): a start bit
(logical ‘0’), 8 data bits (LSB first), a programmable 9
(logical ‘1’). In fact, Mode 3 is the same as Mode 2 in all respects except baud rate.
The baud rate in Mode 3 is variable and is determined by the Timer 1 overflow rate or
the Baud Rate Generator (described in
selection”).
The P89LPC932 enhanced UART has an independent Baud Rate Generator. The
baud rate is determined by a baud-rate preprogrammed into the BRGR1 and BRGR0
SFRs which together form a 16-bit baud rate divisor value that works in a similar
manner as Timer 1. If the baud rate generator is used, Timer 1 can be used for other
timing functions.
The UART can use either Timer 1 or the baud rate generator output (see
Note that Timer T1 is further divided by 2 if the SMOD1 bit (PCON.7) is cleared. The
independent Baud Rate Generator uses OSCCLK.
Framing error is reported in the status register (SSTAT). In addition, if SMOD0
(PCON.6) is ‘1’, framing errors can be made available in SCON.7 respectively. If
SMOD0 is ‘0’, SCON.7 is SM0. It is recommended that SM0 and SM1 (SCON.7:6)
are set up when SMOD0 is ‘0’.
Fig 12. Baud rate sources for UART (Modes 1, 3).
Baud Rate Generator
Timer 1 Overflow
(CCLK-based)
(PCLK-based)
Section 8.19.5 “Baud rate generator and
Rev. 04 — 06 January 2004
8-bit microcontroller with accelerated two-clock 80C51 core
th
data bit goes into RB8 in Special Function Register SCON,
th
data bit (TB8 in SCON) can be assigned the value of ‘0’ or
¸
2
SMOD1 = 1
SMOD1 = 0
Section 8.19.5 “Baud rate generator and
th
data bit, and a stop bit (logical ‘1’). When
SBRGS = 0
SBRGS = 1
th
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
selection”).
data bit, and a stop bit
P89LPC932
Baud Rate Modes 1 and 3
1
002aaa419
16
Figure
or
1
31 of 60
32
12).
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