W83697HFFDC Information Storage Devices, Inc, W83697HFFDC Datasheet - Page 59

• Manufacturer Part Number: W83697HFFDC
• Description: LPC Interface I/o Plus Game/midi Port, Fan Control, Flash ROM I/f
• Manufacturer: Information Storage Devices, Inc

4.2.3
This register controls the pins of the UART used for handshaking peripherals such as modem, and
controls the diagnostic mode of the UART.
Bit 4: When this bit is set to a logical 1, the UA RT enters diagnostic mode by an internal loopback, as
Bit 3: The UART interrupt output is enabled by setting this bit to a logic 1. In the diagnostic mode this bit
Bit 2: This bit is used only in the diagnostic mode. In the diagnostic mode this bit is internally
Bit 1: This bit controls the RTS output. The value of this bit is inverted and output to RTS .
Bit 0: This bit controls the DTR output. The value of this bit is inverted and output to DTR .
follows:
(1) SOUT is forced to logical 1, and SIN is isolated from the communication link instead of the
(2) Modem output pins are set to their inactive state.
(3) Modem input pins are isolated from the communication link and connect internally as DTR
is internally connected to the modem control input DCD .
connected to the modem control input RI .
Handshake Control Register (HCR) (Read/Write)
TSR.
(bit 0 of HCR)
Aside from the above connections, the UART operates normally. This method allows the CPU
to test the UART in a convenient way.
RI and IRQ enable ( bit 3 of HCR)
7
0
0
6
DSR, RTS ( bit 1 of HCR)
5
0
4
3
2
- 50 -
DCD .
1
0
Data terminal ready (DTR)
Request to send (RTS)
Loopback RI input
IRQ enable
Internal loopback enable
CTS , Loopback RI input ( bit 2 of HCR)
Publication Release Date: Feb. 2002
W83697HF/F
Revision 0.70