tmp89ch42 TOSHIBA Semiconductor CORPORATION, tmp89ch42 Datasheet - Page 44

• Manufacturer Part Number: tmp89ch42
• Description: 8 Bit Microcontroller Tlcs-870/c1 Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

2.3
System clock controller
RB000
2.3.6.2
Note:When the operation returns to the NORMAL2 mode, fc is input to the frequency division circuit of the warm-up
counter.
interrupts. The following states are maintained during these modes.
The IDLE1/2 and SLEEP1 modes are controlled by the system control register 2 (SYSCR2) and maskable
IDLE1/2 and SLEEP1 modes
1. The CPU and the watchdog timer stop their operations. The peripheral circuits continue to operate.
2. The data memory, the registers, the program status word and the port output latches are all held
3. The program counter holds the address of the instruction 2 ahead of the instruction which starts
(Normal release mode)
in the status in effect before IDLE1/2 or SLEEP1 mode was started.
the IDLE1/2 or SLEEP1 mode.
Figure 2-10 IDLE1/2 and SLEEP 1 Modes
No
No
No
which follows the IDLE1/2 mode
Starting IDLE1/2 mode or
Execution of the instruction
SLEEP1 mode by an
CPU and WDT stop
Interrupt processing
or SLEEP1 mode start
Reset input
instruction
Page 30
instruction
IMF = "1"
Interrupt
request
Yes
Yes
No
(Interrupt release mode)
Yes
Reset
TMP89CH42