tmp89ch42 TOSHIBA Semiconductor CORPORATION, tmp89ch42 Datasheet - Page 23

• Manufacturer Part Number: tmp89ch42
• Description: 8 Bit Microcontroller Tlcs-870/c1 Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

RB000
2. CPU Core
2.1
2.2
2.2.1
and a data area to be accessed as sources and destinations of transfer and calculation instructions.
Configuration
Memory space
The CPU core consists of a CPU, a system clock controller and a reset circuit.
This chapter describes the CPU core address space, the system clock controller and the reset circuit.
The 870/C1 CPU memory space consists of a code area to be accessed as instruction operation codes and operands
Both the code and data areas have independent 64-Kbyte address spaces.
tables.
Code area
The code area stores operation codes, operands, vector tables for vector call instructions and interrupt vector
The RAM and the MaskROM are mapped in the code area.
Figure 2-1 Memory Map in the Code Area
0xFFCC
0xFFBF
0xBFFF
0xFFA0
0xFFFF
0xC000
0x003F
0x083F
0x0000
0x0040
Immediately after re-
Vector table for vec-
Interrupt vector table
tor call instructions
(0xFF) is fetched.
SWI instruction
(16384 bytes)
Mask ROM
set release
(32 bytes)
(52 bytes)
Page 9
Interrupt vector table
Vector table for vec-
mapped in the code
tor call instructions
(0xFF) is fetched.
(0xFF) is fetched.
When the RAM is
SWI instruction
SWI instruction
(16384 bytes)
(2048 bytes)
Mask ROM
(32 bytes)
(52 bytes)
RAM
area
TMP89CH42