tmp89fm46a TOSHIBA Semiconductor CORPORATION, tmp89fm46a Datasheet - Page 38

• Manufacturer Part Number: tmp89fm46a
• Description: Tlcs-870/c1 Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

RA000
2.3.3
Clock gear control register
(0x0FCF)
CGCR
2.3.3.1
Note 1: fh: High-frequency reference clock [Hz], fcgck: Gear clock [Hz]
Note 2: Don't change CGCR<FCGCKSEL> in the SLOW mode.
Note 3: Bits 7 to 2 of CGCR are read as "0".
Functions
peripheral circuits.
frequency clock and one for the external low-frequency clock.
of I/O Ports.
pins), set P0FC0 to "1" and then set SYSCR2<XEN> to "1".
pins), set P0FC2 to "1" and then set SYSCR2<XTEN> to "1".
connecting an oscillator between the XIN and XOUT pins and between the XTIN and XTOUT pins, respec-
tively.
XTIN pins and the XOUT/XTOUT pins are kept open.
low-frequency clock oscillation circuit and switching the pin function to ports are controlled by the software
and hardware.
register P0FC.
is switched to the STOP mode as described in "2.3.5 Operation mode control circuit".
FCGCKSEL
Read/Write
Bit Symbol
After reset
The clock generator generates the basic clock for the system clocks to be supplied to the CPU core and
It contains three oscillation circuits: one for the internal high-frequency clock, one for the external high-
The oscillation circuit pins are also used as ports P0. For the setting to use them as ports, refer to the chapter
To use ports P00 and P01 for the external high-frequency clock oscillation circuit (as the XIN and XOUT
To use ports P02 and P03 for the external low-frequency clock oscillation circuit (as the XTIN and XTOUT
The external high-frequency (fc) clock and the external low-frequency (fs) clock can easily be obtained by
Clock input from an external oscillator is also possible. In this case, external clocks are applied to the XIN/
Enabling/disabling the oscillation of the external high-frequency clock oscillation circuit and the external
The software control is executed by SYSCR2<XEN>, SYSCR2<XTEN> and the P0 port function control
The hardware control is executed by reset release and the operation mode control circuit when the operation
Clock generator
Note:No hardware function is available for external direct monitoring of the basic clock. The oscillation fre-
quency can be adjusted by programming the system to output pulses at a certain frequency to a port
(for example, a clock output) with interrupts disabled and the watchdog timer disabled and monitoring
the output. An adjustment program must be created in advance for a system that requires adjustment
of the oscillation frequency.
Clock gear setting
R
7
0
-
R
6
0
-
R
5
0
-
00 :
01 :
10 :
11 :
Page 19
fcgck = fh / 4
fcgck = fh / 2
fcgck = fh
Reserved
R
4
0
-
R
3
0
-
R
2
0
-
1
0
TMP89FM46A
FCGCKSEL
R/W
0
0