dm9332 Davicom Semiconductor, Inc., dm9332 Datasheet - Page 38

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dm9332

Manufacturer Part Number
dm9332
Description
10/100mbps Ethernet Fiber/twisted Pair Single Chip Media Converter
Manufacturer
Davicom Semiconductor, Inc.
Datasheet
38
8
7
6
5
4
3
2
1
0
RPDCTR-EN
F_LINK_100
Reserved
Reserved
Reserved
Reserved
SMRST
MFPSC
SLEEP
0, RW
0, RW
0, RW
0, RW
1, RW
0, RW
1, RW
0, RW
0, RW
10/100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter
Reserved
Force to 0 in application.
Force Good Link in 100Mbps
0 = Normal 100Mbps operation
1 = Force 100Mbps good link status
This bit is useful for diagnostic purposes
Reserved
Force to 0 in application.
Reserved
Force to 0 in application.
Reduced Power Down Control Enable
This bit is used to enable automatic reduced power down
0 = Disable automatic reduced power down
1 = Enable automatic reduced power down
Reset State Machine
When writes 1 to this bit, all state machines of PHY will be reset.
This bit is self-clear after reset is completed
MF Preamble Suppression Control
MII frame preamble suppression control bit
1 = MF preamble suppression bit on
0 = MF preamble suppression bit off
Sleep Mode
Writing a 1 to this bit will cause PHY entering the Sleep mode and
power down all circuit except oscillator and clock generator circuit.
When waking up from Sleep mode (write this bit to 0), the
configuration will go back to the state before sleep; but the state
machine will be reset
Reserved
Force to 0 in application.
DM9332
Preliminary datasheet
DM9332-15-DS-P01
August 26, 2009

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