dm9332 Davicom Semiconductor, Inc., dm9332 Datasheet - Page 16

• Manufacturer Part Number: dm9332
• Description: 10/100mbps Ethernet Fiber/twisted Pair Single Chip Media Converter
• Manufacturer: Davicom Semiconductor, Inc.

6.1 EEPROM & PHY Control Register (0BH)
6.2 EEPROM & PHY Address Register (0CH)
6.3 EPROM & PHY Data Register (0DH~0EH)
6.4 Vendor ID Register (28H~29H)
6.5 Port 2 driving capability Register (3AH)
16
7:0
7:0
Bit
7:0
7:0
Bit
6:5
7:6
7:6
5:0
Bit
Bit
4:0
Bit
5
4
3
2
1
0
7
RESERVED
EE_PHY_H
EE_PHY_L
PHY_ADR
RESERVED
Name
ERPRW
VIDH
P2_CURR
VIDL
ERPRR
Reserved
EROA
Name
Name
EPOS
ERRE
Name
REEP
WEP
Name
PE,0AH,RO
PE,46H.RO
PH01,RW
PH0,RW
PH0,RW
PH0,RW
PH0,RW
PH0,RW
PH0,RW
PH0,RW
PH0,RW
PH0,RO
Default
Default
Default
Default
P01,RW
P01,RW
0,RO
Default
0,RO
10/100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter
Reserved
Reload EEPROM. Driver needs to clear it up after the operation completes
Write EEPROM Enable
EEPROM or PHY Operation Select
When reset, select EEPROM; when set, select PHY
EEPROM Read or PHY Register Read Command. Driver needs to clear it up after
the operation completes.
EEPROM Write or PHY Register Write Command. Driver needs to clear it up after
the operation completes.
EEPROM Access Status or PHY Access Status
When set, it indicates that the EEPROM or PHY access is in progress
PHY Address bit 1 and 0; the PHY address bit [4:2] is force to 0.
EEPROM Word Address or PHY Register Address
EEPROM or PHY Low Byte Data (0DH)
This data is made to write/read low byte of word address defined in Reg. CH to
EEPROM or PHY
EEPROM or PHY High Byte Data (0EH)
This data is made to write/read high byte of word address defined in Reg. CH to
EEPROM or PHY
Reserved
Port 2 TXD/TXE Driving/Sinking Capability
00: 2mA
01: 4mA (default)
10: 6mA
11: 8mA
reserved
Vendor ID High Byte (29H)
Vendor ID Low Byte (28H)
Description
Description
Description
Description
Description
DM9332
Preliminary datasheet
DM9332-15-DS-P01
August 26, 2009