ncp5424adr2 ON Semiconductor, ncp5424adr2 Datasheet - Page 3

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ncp5424adr2

Manufacturer Part Number
ncp5424adr2
Description
Dual Synchronous Buck Controller With Input Current Sharing
Manufacturer
ON Semiconductor
Datasheet
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. 60 second maximum above 183 C.
MAXIMUM RATINGS
PACKAGE PIN DESCRIPTION
MAXIMUM RATINGS
GATE(L)1
PIN #
V
Operating Junction Temperature, T
Storage Temperature Range, T
ESD Susceptibility (Human Body Model)
Package Thermal Resistance, SOIC−16:
Lead Temperature Soldering:
COMP1, COMP2
10
11
12
13
14
15
16
FB1
1
2
3
4
5
6
7
8
9
Pin Symbol
GATE(H)1
IS+1, IS+2
GATE(H)2
, V
R
GND
BST
V
FB+2
IS−
GATE(H)1
GATE(H)2
GATE(L)1
GATE(L)2
OSC
SYMBOL
CC
,
COMP1
COMP2
GATE(L)2
V
V
R
GND
V
IS+1
IS+2
BST
V
IS−
FB−2
FB+2
, V
OSC
FB1
CC
,
FB−2
High Side Switch FET driver pin for channel 1.
Low Side Synchronous FET driver pin for channel 1.
Ground pin for all circuitry contained in the IC. This pin is internally bonded to the substrate of the IC.
Power input for GATE(H)1 and GATE(H)2 pins.
Positive input for channel 1 overcurrent comparator.
Negative input for channels 1 and 2 overcurrent comparator.
Error amplifier inverting input for channel 1.
Channel 1 Error Amp output. PWM Comparator reference input. A capacitor to LGND provides Error Amp compensation.
The same capacitor provides Soft−Start timing for channel 1. This pin also disables the channel 1 output when pulled
below 0.3 V.
Channel 2 Error Amp output. PWM Comparator reference input. A capacitor to LGND provides Error Amp compensation
and Soft−Start timing for channel 2. Channel 2 output is disabled when this pin is pulled below 0.3 V.
Error amplifier inverting input for channel 2.
Error amplifier noninverting input for channel 2.
Positive input for channel 2 overcurrent comparator.
Oscillator frequency pin. A resistor from this pin to ground sets the oscillator frequency.
Input Power supply pin.
Low Side Synchronous FET driver pin for channel 2.
High Side Switch FET driver pin for channel 2.
Negative Current Sense for Channels 1 and 2
Compensation Capacitor for Channel 1 or 2
Voltage Feedback Input for Channel 1 or 2
Positive Current Sense for Channel 1 or 2
High−Side FET Driver for Channel 1 or 2
Low−Side FET Driver for Channel 1 or 2
Power Input for GATE(H)1, 2
S
J
Oscillator Resistor
IC Power Input
Pin Name
Ground
Junction−to−Case, R
Junction−to−Ambient, R
Rating
http://onsemi.com
NCP5424
qJC
3
qJA
V
4.0 V
5.0 V
4.0 V
6.0 V
6.0 V
16 V
20 V
20 V
16 V
Reflow: (SMD styles only) (Note 1)
0 V
MAX
FUNCTION
−0.3 V
−0.3 V
−0.3 V
−0.3 V
−0.3 V
−0.3 V
−0.3 V
−0.3 V
−0.3 V
V
0 V
MIN
1.5 A peak, 200 mA DC
1.5 A peak, 200 mA DC
1.5 A peak, 200 mA DC
I
SOURCE
1.0 mA
1.0 mA
1.0 mA
1.0 mA
1.0 mA
N/A
N/A
−65 to +150
230 peak
1.5 A peak, 200 mA DC
1.5 A peak, 200 mA DC
1.5 A peak, 200 mA DC
1.5 A peak, 200 mA DC
Value
150
115
2.0
28
3.5 mA
1.0 mA
1.0 mA
1.0 mA
1.0 mA
I
SINK
N/A
Unit
C/W
C/W
kV
C
C
C

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