ncp1927 ON Semiconductor, ncp1927 Datasheet - Page 19

• Manufacturer Part Number: ncp1927
• Description: Combination Power Factor Correction Controller And Flyback Controller For Flat Panel Tvs
• Manufacturer: ON Semiconductor

PFC switch. A watchdog timer, t
when no switch pulses are detected before it times out
(180 ms typical). The watchdog timer is also useful while
operating at light load because the amplitude of the ZCD
signal may be too small to cross the ZCD thresholds.
Frequency Clamp
half cycle, the switching frequency naturally increases as the
line voltage approaches zero. In order to minimize the PFC
inductor size, the NCP1927 features an internal oscillator
that clamps the maximum switching frequency to f
(typically 385 kHz).
Overvoltage/Undervoltage Protection
causes it to have a slow transient response. This increases the
risk of overshoots during transient conditions (startup, load
steps, etc.). For safe operation, overvoltage protection
(OVP) is utilized to prevent the output voltage from rising
too high and overstressing the power stage components. The
NCP1927 detects high V
until the output voltage returns to nominal levels. This
V ZCD(falling)
V ZCD(rising)
During startup, there are no ZCD transitions to enable the
Since the NCP1927 operates in CrM mode over the ac line
The low bandwidth of the PFC stage feedback network
V ZCD(on)
V CL(NEG)
V CL(POS)
V ZCD(off)
Figure 23. Voltage Waveforms for Zero Current
V out
ZCD Winding
V PDRV
V PZCD
V drain
Detection
out
levels and disables the driver
start
, enables the PFC driver
http://onsemi.com
clamp
time
time
time
time
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protection keeps the output voltage within an acceptable
range.
for both under/overvoltage protections and feedback, the
NCP1927 uses a dedicated pin for undervoltage protection
(UVP) and OVP. This configuration allows the
implementation of two separate feedback networks as
shown in Figure 24.
level of safety, as it protects the PFC stage even if there is a
failure of one of the two feedback arrangements.
pin voltage below the UVP threshold if the pin is left floating
to ensure the PFC stage will be protected.
OVP protection. The output voltage that activates the OVP
fault detection is calculated using Equation 13.
where V
including ripple and V
typical).
immediately turned off. Once the feedback voltage drops
below the hysteresis of V
is re−enabled. This helps to limit overshoots on the output
during startup and transient loads. Figure 25 depicts the
operation of the OVP circuitry, while Figure 26 shows the
internal block diagram.
R POVUV1
R POVUV2
V
While traditional PFC controllers often use one single pin
The double feedback configuration provides an increased
A 1 mA (typical) current source, I
A comparator connected to the POVUV pin provides the
When the OVP comparator is activated, the PFC driver is
out(OVP)
Figure 24. Configuration with Two Separate
out(OVP)
+ V
V out
OVP
is the peak value of the output voltage
Feedback Networks
@
R
POVUV1
R PFB1
R PFB2
OVP
OVP
R
POVUV2
is the OVP threshold (2.5 V
) R
(V
POVUV
OVP(HYS)
PFB
POVUV2
UVP
, pulls the POVUV
) I
), the PFC driver
UVP
@ R
(eq. 13)
POVUV1