ncp1927 ON Semiconductor, ncp1927 Datasheet - Page 17

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ncp1927

Manufacturer Part Number
ncp1927
Description
Combination Power Factor Correction Controller And Flyback Controller For Flat Panel Tvs
Manufacturer
ON Semiconductor
Datasheet

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Part Number:
ncp1927DR2G
Manufacturer:
ON Semiconductor
Quantity:
1 950
Output Regulation
operational transconductance amplifier (OTA) with the
inverting input connected to the PFB pin and the output
connected to the PControl pin to regulate the output voltage.
It features a typical transconductance (gm) of 200 mS and a
maximum output (I
(typical). The non−inverting input is connected internally to
a voltage reference (V
$1.5% over process and temperature. During normal
operation, the voltage on the PControl pin varies between
V
(typically 5.6 V). A simplified diagram of the OTA circuit
is shown in Figure 19.
provides a scaled−down representation of the output voltage
(V
V
(V
towards V
and the on time of the driver (t
power delivered to the load and brings V
regulation. Alternatively, if V
the EA sinks current and V
shortening t
voltage is calculated using Equation 7.
where R
R
noise immunity and power dissipation. While a lower
impedance provides better noise immunity, it also increases
power dissipation. Once the divider current is chosen, R
is determined using Equation 8.
C
PControl(MIN)
REF
PFB2
The NCP1927 error amplifier (EA) consists of an
A resistor divider from the boost output to the PFB pin
The impedance of the feedback network determines its
Figure 19. Error Amplifier and On Time Regulation
out
PControl
PFB
) to the EA. When V
. If V
) drops and the EA sources current until V
is the lower resistor.
PFB1
REF
out
on
is the upper resistor of the resistor divider, and
drops below regulation, the feedback voltage
. This increases the control voltage (V
V
until V
out
(typically 0.6 V) and V
+ V
EA(SRC)
R
out
REF
REF
PFB1
Circuits
returns to regulation. The output
out
) with a typical value of 2.5 V
@
+
out
R
on
is in regulation, V
and I
PFB1
), which in turn increases the
I
divider
(and also V
V
PControl
R
out
PFB2
) R
EA(SNK)
PFB2
decreases, thus
PFB
) of $20 mA
out
PControl(MAX)
) is too high,
PFB
PFB
back into
PControl
returns
(eq. 7)
(eq. 8)
http://onsemi.com
equals
PFB1
)
17
where I
Compensation
PControl pin and ground due to the nature of an active PFC
circuit. The PFC stage generates a sinusoidal current from
the ac line voltage and provides the load with a power that
matches the average demand. When the input voltage is at
its peak, the PFC stage delivers more power than the load
requires, and the output capacitor charges. Conversely,
when the input voltage is at a valley, the load requires more
power than the PFC stage can deliver, and the output
capacitor discharges. The situation is depicted in Figure 20.
twice the line frequency (f
remain constant during each ac line cycle to maintain good
power factor correction, the EA must reject the output
ripple. This is commonly achieved by setting the regulation
bandwidth below 20 Hz. A type 1 compensation network is
typically used for simplicity, as it only requires a single
capacitor (C
and ground (see Figure 19). For a type 1 network, C
is calculated using Equation 10.
where gm is the transconductance of the EA (typically
200
less than 20 Hz).
Using R
A compensation network must be connected between the
This creates a ripple on the output with frequency equal to
Figure 20. Output Voltage Ripple for a Constant
mS)
P
, and f
divider
P
in
out
(t)
V
PFB1
V
I
out
(t)
in
PControl
in
(t)
c
(t)
(t)
is the resistor divider current.
, R
is the desired crossover frequency (typically
R
PFB2
PFB2
) connected between the PControl pin
C
PControl
Output Power
is calculated with Equation 9.
+
R
V
line
PFB1
+
out
). Since the on time must
2p @ f
* V
gm
@ V
REF
REF
c
(eq. 10)
PControl
(eq. 9)
time
time
time

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