w83977atg Winbond Electronics Corp America, w83977atg Datasheet - Page 167

• Manufacturer Part Number: w83977atg
• Description: W83877tf Plus Kbc, Gp I/o, Wake-up, Fir, Cir, Pb-free
• Manufacturer: Winbond Electronics Corp America

CRF2 (Default 0x00)
These bits indicate that the individual device wakes up due to any I/O access, IRQ, and external input
to the device. The device's idle timer reloads the preset expiry depending on which device wakes up.
These 5 bits are controlled by IR, the printer port, FDC, UART A, and UART B power down machines
respectively. Writing a 1 clears this bit, and writing a 0 has no effect. Note that the user is not
supposed to change the status while power management function is enabled.
CRF3 (Default 0x00)
These bits indicate the IRQ status of the individual device. The device's IRQ status bit is set by their
source device and is cleared by writing a 1. Writing a 0 has no effect.
Bit 7
Bit 6
Bit 5 - 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
: Reserved. Return zero when read.
: IRIRQSTS. IR IRQ status.
: MOUIRQSTS. MOUSE IRQ status.
: Reserved. Return zero when read.
: IRTRAPSTS. IR trap status.
= 0
= 1
transmitting a
: Reserved. Return zero when read.
: PRTTRAPSTS. Printer port trap status.
= 0
= 1
and
: FDCTRAPSTS. FDC trap status.
= 0
= 1
register.
: URATRAPSTS. UART A trap status.
= 0
= 1
: URBTRAPSTS. UART B trap status.
= 0
= 1
IR is now in the sleeping state.
IR is now in the working state due to any IR access, any IRQ, the receiver
the printer port is now in the sleeping state.
the printer port is now in the working state due to any printer port access, any
IRQ, any DMA acknowledge, and any transition on BUSY, ACK , PE, SLCT,
FDC is now in the sleeping state.
FDC is now in the working state due to any FDC access, any IRQ, any DMA
UART A is now in the sleeping state.
UART A is now in the working state due to any UART A access, any IRQ, the
transmitting a start bit, and any transition on MODEM control input lines.
UART B is now in the sleeping state.
UART B is now in the working state due to any UART B access, any IRQ, the
transmitting a start bit, and any transition on MODEM control input lines.
ERR pins.
begins receiving a start bit, and the transmitter shift register begins
acknowledge, and any enabling of the motor enable bits in the DOR
receiver begins receiving a start bit, the transmitter shift register begins
receiver begins receiving a start bit, the transmitter shift register begins
start bit.
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W83977ATF/W83977ATG
Publication Release Date: May 2006
Revision 0.6