w83977atg Winbond Electronics Corp America, w83977atg Datasheet - Page 122

• Manufacturer Part Number: w83977atg
• Description: W83877tf Plus Kbc, Gp I/o, Wake-up, Fir, Cir, Pb-free
• Manufacturer: Winbond Electronics Corp America

W83977ATF/W83977ATG
1. Writing a 0 to GBL_RLS has no effect. Writing a 1 to BIOS_STS clears it to logic 0 and also clears
GBL_RLS to logic 0. Writing a 0 to BIOS_STS has no effect.
For the bus master to raise an event to the ACPI software, BM_CNTRL, BM_RLD, and BM_STS bits
are involved. Both BM_RLD and BM_STS are controlled by the ACPI software. If BM_CNTRL is set
by the BIOS software and BM_RLD is set by the ACPI software, an SCI interrupt is raised. Writing a 1
to BM_CNTRL sets it to logic 1 and also sets BM_STS to logic 1. Writing a 0 to BM_CNTRL has no
effect. Writing a 1 to BM_STS clears it to logic 0 and also clears BM_CNTRL to logic 0. Writing a 0 to
BM_STS has no effect.
12.2 Power Management Timer
In the ACPI specification, a power management timer is required. The power management timer is a
24-bit fixed rate free running up-count timer that runs off a 3.579545MHZ clock. The power
management timer corresponds to status bit (TMR_STS) and enable bit (TMR_EN). The TMR_STS
bit is set any time the last bit of the timer (bit 23) goes from 0 to 1 or from 1 to 0. If the TMR_EN bit is
set, the setting of the TMR_STS bit will generate an SCI interrupt. Three registers are used to read
the timer value which are located in the PM1 register block. The power management timer has one
enable bit (TMR_ON) to turn it on or off. The TMR_ON is located in GPE register block. If it is cleared
to 0, the power management timer function will not work. There are no timer reset requirements,
except that the timer should function after power-up. See the following figure for illustration.
TMR_STS
TMR_ON
24 bit
counter
To SCI Logic
Bits (23-0)
3.579545 MHz
24
TMR_EN
TMR_VAL
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