sta002 STMicroelectronics, sta002 Datasheet - Page 29

• Manufacturer Part Number: sta002
• Description: Starmano Channel Decoder
• Manufacturer: STMicroelectronics

Reg name: PIW_ RAM
Internal address: 03F,03E, 03D, 03C,
Type: W
PIW_RAM (63:56) (addr 03F)
PIW_RAM (55:48) (addr 03E)
PIW_RAM (47:40) (addr 03D)
PIW_RAM (39:32) (addr 03C)
PIW_RAM (31:24) (addr 03B)
PIW_RAM (23:16) (addr 03A)
PIW_RAM (15:8) (addr 039)
PIW_RAM (7:0) (addr 038)
Description:
b63 tob0 contain the prestored initialization word
0 which is the only one downloadable by the
processor.
MSB
MSB
MSB
MSB
MSB
MSB
MSB
MSB
b63
b55
b47
b39
b31
b23
b15
b7
b62
b54
b46
b38
b30
b22
b14
b6
b61
b53
b45
b37
b29
b21
b13
b5
03B, 03A, 039, 038,
b60
b52
b44
b36
b28
b20
b12
b4
b59
b51
b43
b35
b27
b19
b11
b3
b58
b50
b42
b34
b26
b18
b10
b2
b57
b49
b41
b33
b25
b17
b9
b1
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
b56
b48
b40
b32
b24
b16
b8
b0
Reg name: EM_REG
Internal address: 018H
Type: R/W
Description :
Encryption mode register
b7 to b1 = not used RFU
b0 indicate the encryption mode (1)
1: normal encryption mode
0: enable blocking
(1) for more information refer to document
Reg name: PIWE_REG
Internal address: 01AH, 019H
Type: R/W
PIWE (15:8) (addr 01AH)
PIWE (7:0) (addr 019H)
Description :
b15 to b0 contain the 16 BIT static key selector
word. Each bit PIWE enables a certain static key.
If bit A0 of PIWE is set, the static key 0 will be en-
abled for read out and so forth.
Reg name: BCIN_DELAY_REG
Internal address: 01BH
Type: R/W
Default 00H
Description : BC input delay and BC input enable
register
b0: enables external BC input
MSB
MSB
MSB
MSB
b15
b7
b7
b7
number WST-WSG-DDS-003-500000
Chipset Encryption Implementation Specification
for World space receiver
b14
b6
b6
b6
b13
b5
b5
b5
b12
b4
b4
b4
b11
b3
b3
b3
b10
b2
b2
b2
b1
b9
b1
b1
STA002
LSB
LSB
LSB
LSB
29/43
b0
b8
b0
b0