at43usb320a ATMEL Corporation, at43usb320a Datasheet - Page 61
at43usb320a
Manufacturer Part Number
at43usb320a
Description
Full-speed Usb Microcontroller With An Embedded Hub
Manufacturer
ATMEL Corporation
Datasheet
1.AT43USB320A.pdf
(115 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- Current page: 61 of 115
- Download datasheet (2Mb)
UART Control
UART I/O Data
Register
UART Status
Register
1443E–USB–4/04
–
–
UDR
USR
The UDR register is actually two physically separate registers sharing the same I/O address.
When writing to the register, the UART Transmit Data register is written. When reading from
UDR, the UART Receive Data register is read.
The USR register is a read-only register providing information on the UART status.
• Bits 7 – RXC: UART Receive Complete
This bit is set (one) when a received character is transferred from the Receiver Shift register to
UDR. The bit is set regardless of any detected framing errors. When the RXCIE bit in UCR is
set, the UART Receive Complete interrupt will be executed when RXC is set (one). RXC is
cleared by reading UDR. When interrupt-driven data reception is used, the UART Receive
Complete Interrupt routine must read UDR in order to clear RXC, otherwise a new interrupt will
occur once the interrupt routine terminates.
• Bit 6 – TXC: UART Transmit Complete
This bit is set (one) when the entire character (including the stop bit) in the Transmit Shift reg-
ister has been shifted out an d no new data has been written to UDR. This flag is especially
useful in half-duplex communications interfaces, where a transmitting application must enter
receive mo de and free the communicatio ns bu s immediately after completing the
transmission.
When the TXCIE bit in UCR is set, setting of TXC causes the UART Transmit Complete inter-
rupt to be executed. TXC is cleared by hardware when executing the corresponding interrupt
handling vector. Alternatively, the TXC bit is cleared (zero) by writing a logical "1"to the bit.
• Bit 5 – UDRE: UART Data Register Empty
This bit is set (one) when a character written to UDR is transferred to the Transmit Shift regis-
ter. Setting of this bit indicates that the transmitter is ready to receive a new character for
transmission.
Read/Write
Initial Value
Read/Write
Initial Value
$0D ($2C)
$0D ($2B)
Bit
Bit
MSB
RXC
R/W
R/W
7
0
7
0
R/W
TXC
R/W
6
–
0
6
0
UDRE
R/W
R
5
–
0
5
0
R/W
FE
R
4
–
0
4
0
R/W
OR
R
3
–
0
3
0
R/W
R
2
–
0
2
–
0
AT43USB320A
R/W
R
1
–
0
1
–
0
LSB
R/W
R
0
0
0
–
0
UDR
USR
61
Related parts for at43usb320a
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
INTERVAL AND WIPE/WASH WIPER CONTROL IC WITH DELAY
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Low-Voltage Voice-Switched IC for Hands-Free Operation
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
MONOLITHIC INTEGRATED FEATUREPHONE CIRCUIT
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
AM-FM Receiver IC U4255BM-M
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Monolithic Integrated Feature Phone Circuit
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Multistandard Video-IF and Quasi Parallel Sound Processing
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
High-performance EE PLD
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
8-bit Flash Microcontroller
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
2-Wire Serial EEPROM
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
U6046BREAR WINDOW HEATING TIMER / LONG-TERM TIMER
Manufacturer:
ATMEL Corporation
Datasheet: