at43usb320a ATMEL Corporation, at43usb320a Datasheet - Page 49
at43usb320a
Manufacturer Part Number
at43usb320a
Description
Full-speed Usb Microcontroller With An Embedded Hub
Manufacturer
ATMEL Corporation
Datasheet
1.AT43USB320A.pdf
(115 pages)
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1443E–USB–4/04
Figure 13. Effects on Unsynchronized OCR1 Latching
Note:
X = A or B
Unsynchronized
Synchronized
Table 17. Compare1 Mode Select in PWM Mode
Note:
Note that in the PWM mode, the 10 least significant OCR1A/OCR1B bits, when written, are
transferred to a temporary location. They are latched when Timer/Counter1 reaches the value
TOP. This prevents the occurrence of odd-length PWM pulses (glitches) in the event of an
unsynchronized OCR1A/OCR1B write. See Figure 13 for an example.
During the time between the write and the latch operation, a read from OCR1A or OCR1B will
read the contents of the temporary location. This means that the most recently written value
always will read out of OCR1A/B
When the OCR1 contains $0000 or TOP, the output OC1A/OC1B is updated to low or high on
t h e n e x t c o m p a r e m a t c h , a c c o r d i n g t o t h e s e t t i n g s o f C O M 1 A 1 / C O M 1 A 0 o r
COM1B1/COM1B0. This is shown in Table 18.
Note: If the compare register contains the TOP value and the prescaler is not in use
(CS12..CS10 = 001), the PWM output will not produce any pulse at all, because up-counting
and down-counting values are reached simultaneously. When the prescaler is in use
(CS12..CS10 = 001 or 000), the PWM output goes active when the counter reaches the TOP
COM1X1
OCR1X Latch
OCR1X Latch
0
0
1
1
X = A or B
COM1X0
0
1
0
1
Compare Value Changes
Effect on OCX1
Not connected
Not connected
Cleared on compare match, up-counting. Set on compare match,
down-counting (non-inverted PWM).
Cleared on compare match, down-counting. Set on compare match,
up-counting (inverted PWM).
Compare Value Changes
Glitch
AT43USB320A
Counter Value
Compare Value
Counter Value
Compare Value
PWM Output OC1X
PWM Output OC1X
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