dsp56366 Freescale Semiconductor, Inc, dsp56366 Datasheet - Page 61

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dsp56366

Manufacturer Part Number
dsp56366
Description
Dsp56366 24-bit Audio Digital Signal Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
3.10.3
Freescale Semiconductor
Notes:
250
251
No.
1. Bit 13 in the OMR register must be set to enter Asynchronous Arbitration mode
2. If Asynchronous Arbitration mode is active, none of the timings in
3. In order to guarantee timings 250, and 251, it is recommended to assert
same bus) in a non overlap manner as shown in
BB assertion window from BG input negation.
Delay from BB assertion to BG assertion
RAS
CAS
WR
Arbitration Timings
Characteristics
Table 3-17 Asynchronous Bus Arbitration timing
177
190
170
162
189
Figure 3-17 DRAM Refresh Access
DSP56366 Technical Data, Rev. 3.1
Figure 3-18
157
163
165
.
Table 3-17
Expression
2 .5* Tc + 5
2 * Tc + 5
BG
inputs to different 56300 devices (on the
is required.
162
21.7
Min
120 MHz
Max
25.8
AA0478
Unit
ns
ns
3-35

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