adsp-bf527c Analog Devices, Inc., adsp-bf527c Datasheet - Page 37
adsp-bf527c
Manufacturer Part Number
adsp-bf527c
Description
Blackfin Embedded Processor
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADSP-BF527C.pdf
(44 pages)
- Current page: 37 of 44
- Download datasheet (3Mb)
Preliminary Technical Data
BLACKFIN SPI/TWI INTERFACE TIMING
Table 36. Program Register Input Timing—SPI Serial Control Mode
1
Parameter
t
t
t
t
t
t
t
t
t
AVDD, HPVDD, V
SCS
SCY
SCL
SCH
DSU
DHO
CSL
CSH
CSS
CSCL rising edge to CSB rising edge
CSCL pulse cycle time
CSCL pulse width low
CSCL pulse width high
CSDA to CSCL set-up time
CSCL to CSDA hold time
CSB pulse width low
CSB pulse width high
CSB rising to CSCL rising
CSB
CSCL
CSDA
DDEXT
= 3.3 V, AGND = 0 V, T
Figure 33. Program Register Input Timing—SPI Serial Control Mode
A
t DSU
= +25
Test Conditions
o
C, Slave Mode, f
t SCH
t DHO
Rev. PrC | Page 37 of 44 | June 2008
t SCY
t SCL
t CSL
1
S
= 48 kHz, XTI/CODEC_MCLK = 256 × f
ADSP-BF523C/ADSP-BF525C/ADSP-BF527C
LSB
t SCS
S
unless otherwise stated.
t CSS
t CSH
Min Typical Max Unit
60
80
20
20
20
20
20
20
20
ns
ns
ns
ns
ns
ns
ns
ns
ns
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