adsp-bf527c Analog Devices, Inc., adsp-bf527c Datasheet - Page 18

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adsp-bf527c

Manufacturer Part Number
adsp-bf527c
Description
Blackfin Embedded Processor
Manufacturer
Analog Devices, Inc.
Datasheet
ADSP-BF523C/ADSP-BF525C/ADSP-BF527C
I2S Mode
I
of CODEC_BCLK following a DACLRC or ADCLRC
transition.
Right Justified Mode
Right justified mode is where the LSB is available on the rising
edge of CODEC_BCLK preceding a DACLRC or ADCLRC
transition, yet MSB is still transmitted first.
Frame Sync/PCM Mode
In frame sync/PCM mode, the left channel MSB is available on
either the first (mode B) or second (mode A) rising edge of
CODEC_BCLK (selectable by LRP) following a rising edge of
DACLRC/
ADCLRC
2
CODEC_BCLK
DACDAT/
ADCDAT
S mode is where the MSB is available on the second rising edge
CODEC_BCLK
DACLRC/
ADCLRC
DACDAT/
ADCDAT
MSB
1
1 CODEC_BCLK
2
MSB
3
1
LEFT CHANNEL
LEFT CHANNEL
2
3
n-2 n-1
Rev. PrC | Page 18 of 44 | June 2008
n
Figure 21. Right Justified Mode
LSB
n-2 n-1
Figure 20. I
1/f S
n
LSB
1/f
MSB
S
2
1
S Mode
1 CODEC_BCLK
2
MSB
3
1
RIGHT CHANNEL
RIGHT CHANNEL
2
3
n-2 n-1
Preliminary Technical Data
n
LSB
n-2 n-1
n
LSB

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