cs5461 Cirrus Logic, Inc., cs5461 Datasheet - Page 37

• Manufacturer Part Number: cs5461
• Description: Single-phase, Bidirectional Power/energy Ic
• Manufacturer: Cirrus Logic, Inc.

7.11 AC Current Offset Register and AC Voltage Offset Register
DS546F2
MSB
2
-1
CRDY
VOR
VSAG
VROR
IROR
EOOR
VOD
IOD
LSD
IC
Address:
Default** = 0x000000
The AC Offset Registers are initialized to zero on reset, allowing for uncalibrated normal operation. When AC
Offset Calibration is performed, the offset register(s) is updated with the square of the system AC offset value.
This sequence lasts ~(6N + 30) A/D conversion cycles (where N is the value of the Cycle-Count Register).
DRDY will be asserted at the end of the calibration. The register value may be read and stored for future system
offset compensation.
2
-2
16 (AC Current Offset Register); 17 (AC Voltage Offset Register)
2
-3
and VSAG
RMS Voltage Register.
RMS Current Register.
a pulse output frequency that is too small for the power being measured. This problem can be
corrected by specifying a higher frequency in the PulseRateE register.
an input above Full Scale. Note that the level at which the modulator oscillates is significantly
higher than the voltage channel’s Differential Input Voltage Range.
an input above Full Scale. Note that the level at which the modulator oscillates is significantly
higher than the current channel’s Differential Input Voltage Range.
Note:
old (PMLO), with respect to VA- pin. For a given part, PMLO can be as low as 2.3 V. LSD bit
cannot be permanently reset until the voltage at PFMON pin rises back above the high-voltage
threshold (PMHI), which is typically 100 mV above the device’s low-voltage threshold. PMHI will
never be greater than 2.7 V.
word that is not recognized as one of the valid commands (see Section 6.1, Commands).
Conversion Ready. Indicates a new conversion is ready. This will occur at the output word rate.
Voltage Out of Range.
Indicates that the voltage threshold/duration conditions, specified in the VSAG
RMS Voltage Out of Range. Set when the calibrated RMS voltage value is too large to fit in the
RMS Current Out of Range. Set when the calibrated RMS current value is too large to fit in the
EOUT Energy Summation Register Out of Range. Assertion of this bit can be caused by having
Modulator oscillation detect on the voltage channel. Set when the modulator oscillates due to
Modulator oscillation detect on the current channel. Set when the modulator oscillates due to
Low Supply Detect. Set when the voltage at the PFMON pin falls below the low-voltage thresh-
Invalid Command. Normally logic 1. Set to logic 0 if the host interface is strobed with an 8-bit
2
-4
The IOD and VOD bits may be ‘falsely’ triggered by very brief voltage spikes from the
power line. This event should not be confused with a DC overload situation at the
inputs, when the IOD and VOD bits will re-assert themselves even after being
cleared, multiple times.
2
duration
-5
Registers, have been met.
2
-6
2
-7
2
-8
.....
2
-18
2
-19
2
-20
2
-21
2
-22
level
CS5461
2
-23
LSB
2
-24
37