cs5461 Cirrus Logic, Inc., cs5461 Datasheet - Page 22

• Manufacturer Part Number: cs5461
• Description: Single-phase, Bidirectional Power/energy Ic
• Manufacturer: Cirrus Logic, Inc.

4.9.2 INT Active State
The behavior of the INT pin is controlled by the
IMODE and IINV bits of the Configuration Regis-
ter. The pin can be active low (default), active high,
active on a return to logic 0 (pulse-low), or active
on a return to logic 1 (pulse-high). If the interrupt
output signal format is set for either pulse-high or
pulse-low, the duration of the INT pulse will be at
least one DCLK cycle (DCLK = MCLK / K).
22
Step H3 - Clear the Status Register by writing
back the read value in step H0.
Step H4 - Re-enable interrupts.
Step H5 - Return from interrupt service routine.
This handshaking procedure insures that any
new interrupts activated between steps H0 and
H3 are not lost (cleared) by step H3.
4.10 Voltage Sag-Detect Feature
The CS5461 includes Status Register bit, VSAG;
which indicates a sag in the power line voltage.
In order for sag condition to be identified, the mea-
sured V
level for a specified period of time.
To activate this feature, a voltage threshold value
must be specified in the Voltage Sag Level Register
(VSAG
in the Voltage Sag Duration Register (VSAG
tion
A/D cycles.
If V
the VSAG
er than or equal to the number of A/D conversions
specified in the VSAG
VSAG bit in the Status Register will be asserted.
). This Time Duration is specified in terms of
RMS
Level
RMS
is measured below the level specified in
Level
); and a time-duration must be specified
must remain below a set sag threshold
Register for a duration of time great-
Duration
Register, then the
CS5461
DS546F2
Dura-