s908ey8ad4cfjer Freescale Semiconductor, Inc, s908ey8ad4cfjer Datasheet - Page 116

• Manufacturer Part Number: s908ey8ad4cfjer
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Input/Output (I/O) Ports (PORTS)
DDRA[6:0] — Data Direction Register A Bits
Figure 12-3
When bit DDRAx is a 1, reading address $0000 reads the PTAx data latch. When bit DDRAx is a 0,
reading address $0000 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
116
These read/write bits control port A data direction. Reset clears DDRA[6:0], configuring all port A pins
as inputs.
1 = Corresponding port A pin configured as output
0 = Corresponding port A pin configured as input
shows the port A I/O logic.
X = don’t care
Hi-Z = high impedance
1. Writing affects data register, but does not affect input.
Address:
DDRA
Avoid glitches on port A pins by writing to the port A data register before
changing data direction register A bits from 0 to 1.
Bit
Reset:
Read:
Write:
0
1
READ DDRA ($0004)
WRITE DDRA ($0004)
WRITE PTA ($0000)
READ PTA ($0000)
$0004
Bit 7
PTA
Bit
0
0
X
X
Figure 12-2. Data Direction Register A (DDRA)
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
= Unimplemented
DDRA6
Input, Hi-Z
I/O Pin
Output
6
0
Mode
Table 12-1. Port A Pin Functions
RESET
Figure 12-3. Port A I/O Circuit
DDRA5
5
0
Table 12-1
Accesses to DDRA
DDRA4
NOTE
DDRAx
Read/Write
DDRA[6:0]
DDRA[6:0]
PTAx
4
0
DDRA3
summarizes the operation of the port A pins.
3
0
DDRA2
2
0
PTA[6:0]
Read
Pin
Accesses to PTA
DDRA1
1
0
PTA[6:0]
PTA[6:0]
Freescale Semiconductor
Write
DDRA0
Bit 0
0
PTAx
(1)