AN2109 Freescale Semiconductor / Motorola, AN2109 Datasheet

AN2109

Manufacturer Part Number

AN2109

Description

MPC555 Interrupts

Manufacturer

Freescale Semiconductor / Motorola

Datasheet

1.AN2109.pdf (56 pages)

Current page: 1 of 56
Download datasheet (575Kb)

MPC555 Interrupts

by John Dunlop, Josef Fuchs, and Steve Mihalik

Rev. 0, 26 July 2001

1 Introduction

2 Background

2.1 Interrupts versus Exceptions

2.2 Interrupt Sources and Levels

This document contains information on a new product. Specifications and information herein are subject to change without notice.

MOTOROLA

SEMICONDUCTOR

APPLICATION NOTE

The MPC555 has numerous timers, peripherals and input pins that can generate interrupts. This appli-

cation note describes how the interrupts work and how to write software for their initialization and ser-

vice routines.

Examples illustrate how interrupt handler routines written in assembler, C and even controlled by an

operating system can have a dramatic variation in overhead. This overhead is almost entirely caused

by the amount of context, (i.e., registers), saved and restored in the routine.

Although this application note focuses on interrupts, the discussion of context saving and restoring ap-

plies to other exceptions as well as other Motorola PowerPC™ microcontrollers. In addition, later

MPC5xx microprocessors include an enhanced interrupt controller which has features to reduce laten-

cy. A summary of these features, which are optional to use in these later microcontrollers is listed in

Section Appendix B Enhanced Interrupt Controller

Definitions of “interrupts” and “exceptions” are not always consistent in PowerPC™ literature. The fol-

lowing definitions are used for this application note.

Exceptions are events that change normal program flow and machine state. Some examples of excep-

tions are reset, decrementer passing zero, system call instruction, various bus access errors, and even

a software or hardware debugger. When an exception occurs, a short hardware context switch takes

place and the processor branches to an address (exception vector) which is unique for each type of ex-

ception.

Interrupts are one type of exception. They are caused by interrupt requests from input pins or devices,

such as internal peripherals. As specified in the PowerPC™ architecture, all interrupts are required to

share one exception vector offset, called “external interrupts”, normally at 0x500. The term “external

interrupts” include all interrupts external to the CPU core, not just external to the chip. The terms “ex-

ternal interrupts” and “interrupts” are the same in this application note.

An interrupt source is a device that can initiate an interrupt. For the MPC555, these are:

• Input pins IRQ[0:7]

• Internal timers: time base (TBL), programmable interrupt timer (PIT), or real-time clock (RTC)

• PLL change of lock detector

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

Summary.

Order this document by:

AN2109/D

Related parts for AN2109

Related keywords

AN2109 datasheet
AN2109 data sheet
AN2109 pdf datasheet
AN2109 component
AN2109 part
AN2109 distributor
AN2109 RoHS
AN2109 datasheet download