K20P104M100SF2 Freescale Semiconductor, K20P104M100SF2 Datasheet
K20P104M100SF2
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K20P104M100SF2 Summary of contents
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... This document contains information on a product under development. Freescale reserves the right to change or discontinue this product without notice. © 2010–2010 Freescale Semiconductor, Inc. Preliminary Document Number: K20P104M100SF2 Rev. 1, 11/2010 K20P104M100SF2 • Human-machine interface – Low-power hardware touch sensor interface (TSI) – ...
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... ADC electrical characteristics....35 6.6.1.3 16-bit ADC with PGA operating conditions............................................38 6.6.1.4 16-bit ADC with PGA characteristics...39 6.6.2 CMP and 6-bit DAC electrical specifications.........40 6.6.3 12-bit DAC electrical characteristics.....................41 6.6.3.1 12-bit DAC operating requirements.....41 6.6.3.2 12-bit DAC operating behaviors..........42 6.6.4 Voltage Reference Electrical Specifications..........44 Freescale Semiconductor, Inc. Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Operation..............................................................47 6.8.5 DSPI Switching Specifications (High-speed mode)....................................................................48 6.8.6 SDHC Specifications.............................................50 6.8.7 I2S Switching Specifications.................................51 Freescale Semiconductor, Inc. 6.9 Human-machine interfaces (HMI)......................................53 7 Dimensions...............................................................................54 7.1 Obtaining package dimensions.........................................54 8 Pinout........................................................................................55 8.1 K20 Signal Multiplexing and Pin Assignments..................55 8.2 K20 Pinouts.......................................................................59 9 Revision History........................................................................60 K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010. ...
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... K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010. Preliminary and perform a part number search for Values • Fully qualified, general market flow • Prequalification • K20 • Program flash only • Program flash and FlexMemory Freescale Semiconductor, Inc. Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Definition: Operating requirement An operating requirement is a specified value or range of values for a technical characteristic that you must guarantee during operation to avoid incorrect operation and possibly decreasing the useful life of the chip. Freescale Semiconductor, Inc. Description K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010. Preliminary ...
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... This is an example of an attribute: Symbol CIN_D Input capacitance: digi‐ tal pins 6 Description Min. 0.9 Description Min. 10 Description Min. — K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010. Preliminary Max. Unit 1.1 V Max. Unit 130 µA Max. Unit 7 pF Freescale Semiconductor, Inc. Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Result of exceeding a rating Measured characteristic Freescale Semiconductor, Inc. Description Min. –0.3 The likelihood of permanent chip failure increases rapidly as soon as a characteristic begins to exceed one of its operating ratings. Operating rating K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010. Preliminary Terminology and guidelines Max ...
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... No permanent failure Min K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010. Preliminary Limited Fatal operating range range - Probable permanent failure - No permanent failure - Possible decreased life - Possible incorrect operation Typ. Max. 130 µA Freescale Semiconductor, Inc. ∞ Unit Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Typical Value Conditions Typical values assume you meet the following conditions (or other conditions as specified): Symbol Ratings Freescale Semiconductor, Inc. 0.95 1.00 1.05 V (V) DD Description Ambient temperature 25 3.3 V supply voltage 3.3 K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010. Preliminary T J 150 ° ...
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... Min. Max. Unit — 3 — Min. Max. Unit -2000 +2000 V -500 +500 V -100 +100 mA Min. Max. –0.3 3.8 — 185 –0.3 5.5 –0 0.3 DD Freescale Semiconductor, Inc. Notes 1 2 Notes 1 Notes 1 2 Unit Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Input high voltage IH • 2.7 V ≤ V • 1.7 V ≤ Input low voltage IL • 2.7 V ≤ V • 1.7 V ≤ Input hysteresis HYS Freescale Semiconductor, Inc. 1 ≤ 3 ≤ 2 ≤ 3 ≤ 2 Table continues on the next page... K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010. ...
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... K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010. Preliminary Min. Max. Unit –0 –5 mA Typ. Max. Unit 1.1 TBD V 2.56 TBD V 2.70 TBD V 2.80 TBD V 2.90 TBD V 3.00 TBD TBD TBD V 1.80 TBD V 1.90 TBD V 2.00 TBD V 2.10 TBD V Freescale Semiconductor, Inc. Notes 1 1 Notes 1 1 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Input leakage current (per pin Hi-Z (off-state) leakage current (per pin and Internal weak pullup and pulldown resistors Measured at V max and V IL Freescale Semiconductor, Inc. Min. TBD TBD HYS ≤ 3 -10mA DD OH ≤ 2 -3mA DD OH ≤ 3 ...
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... K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010. Preliminary Min. Max. Unit — 300 μs — 4.1 μs — 123.8 μs — 4.1 μs — 49.3 μs — 4.1 μs — 49.2 μs — 4.1 μs — 5.9 μs — 4.1 μs — 4.2 μs — 4.1 μs — 5.8 μs Freescale Semiconductor, Inc. Notes 1 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Code executing from flash MHz core, system, FlexBus, and bus clock and 1MHz flash clock. MCG configured for fast IRCLK mode. All peripheral clocks enabled but peripherals are not in active operation. Code executing from flash. Freescale Semiconductor, Inc. Min. — ...
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... All peripheral clocks enabled but peripherals are not in active operation • LVD disabled, USB regulator disabled • No GPIOs toggled • Code execution from flash 16 K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010. Preliminary Freescale Semiconductor, Inc. Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Specified according to Annex D of IEC Standard 61967-2, Measurement of Radiated Emissions—TEM Cell and Wideband TEM Cell Method, and Appendix D of SAE Standard J1752-3, Measurement of Radiated Emissions from Integrated Circuits—TEM/Wideband TEM (GTEM) Cell Method. Freescale Semiconductor, Inc MHz (crystal MHz BUS K20 Sub-Family Data Sheet Data Sheet, Rev ...
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... K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010. Preliminary www.freescale.com and Min. Max. — 7 — 7 Min. Max. Unit — 100 MHz — 50 MHz — 50 MHz — 25 MHz — 2 MHz — 2 MHz — 2 MHz — 1 MHz Freescale Semiconductor, Inc. Unit pF pF Notes Datasheet pdf - http://www.DataSheet4U.net/ ...
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... The value includes the thermal resistance of the interface material between the top of the package and the cold plate. 4. Determined according to JEDEC Standard JESD51-2, Integrated Circuits Thermal Test Method Environmental Conditions—Natural Convection (Still Air). Freescale Semiconductor, Inc. Table 9. Thermal operating requirements K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010. Preliminary Peripheral operating requirements and behaviors Min ...
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... Table continues on the next page... K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010. Preliminary Min. Max. Unit Frequency dependent MHz 2 — — ns — — — — Min. Max. Unit 2.7 3.6 V MHz 1/J1 — ns Freescale Semiconductor, Inc. Datasheet pdf - http://www.DataSheet4U.net/ ...
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... J12 TCLK low to TDO high-Z J13 TRST assert time J14 TRST setup time (negation) to TCLK high TCLK (input) Freescale Semiconductor, Inc. Table 11. JTAG electricals (continued Figure 5. Test clock input timing K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010. Preliminary Peripheral operating requirements and behaviors Min ...
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... Figure 7. Test Access Port timing K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010. Preliminary J5 J6 Input data valid Output data valid Output data valid J9 J10 Input data valid Output data valid Output data valid Freescale Semiconductor, Inc. Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Internal reference frequency (fast clock) — factory intf_ft trimmed at nominal VDD and 25°C f Internal reference frequency (fast clock) — user intf_t trimmed Freescale Semiconductor, Inc. J14 J13 Figure 8. TRST timing Table 12. MCG specifications Min. 31.25 3.875 Table continues on the next page... ...
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... TBD TBD ps — TBD TBD ps — — — 100 MHz 2.0 — 4.0 MHz — 400 — ps — TBD — ps — ± 2.98 % — ± 5.97 % — — 0. 1075( pll_ref Freescale Semiconductor, Inc. Notes Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Supply current — high gain mode DDOSC • 32 kHz • 1 MHz • 4 MHz • 8 MHz • 16 MHz • 24 MHz • 32 MHz C EXTAL load capacitance x C XTAL load capacitance y Freescale Semiconductor, Inc. Min. 1.71 — — — — — — — — — — — — ...
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... MΩ — — kΩ 200 — kΩ — — kΩ 6.6 — kΩ 3.3 — kΩ 0 — kΩ 0 — kΩ 0 — kΩ 0 — kΩ 0 — kΩ 0.6 — — V DD33OSC 0.6 — — V DD33OSC Freescale Semiconductor, Inc Notes Datasheet pdf - http://www.DataSheet4U.net/ ...
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... T A Symbol Description V Supply voltage BAT R Internal feedback resistor F C Parasitical capacitance of EXTAL32 and XTAL32 para C Internal load capacitance (programmable) load V Peak-to-peak amplitude of oscillation pp Freescale Semiconductor, Inc. (max Min — — — — K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010. ...
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... Min. Typ. Max. Unit — 20 TBD — 20 100 ms — 160 800 ms Min. Typ. Max. Unit — — 1.4 ms — — 40 — — 35 Freescale Semiconductor, Inc. (min) Notes 1, 2 Notes μ Notes μs μs Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Typical data retention values are based on intrinsic capability of the technology measured at high temperature derated to 25°C. For additional information on how Freescale defines typical data retention, please refer to Engineering Bulletin EB618. 2. Data retention is based Cycling endurance represents number of program/erase cycles at -40°C ≤ T Freescale Semiconductor, Inc. Min. — — — ...
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... K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010. Preliminary Min. Max. 2.7 3.6 — SYS — SYS — EZP_CK 5 — 5 — 2 — 5 — — — — 12 EP2 Freescale Semiconductor, Inc. Unit V MHz MHz Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Specification is valid for all FB_AD[31:0], FB_BE/BWEn, FB_CSn, FB_OE, FB_R/W,FB_TBST, FB_TSIZ[1:0], and FB_TS. 2. Specification is valid for all FB_AD[31:0] and FB_TA. FB_CLK FB_A[Y] FB_D[X] FB_RW FB_TS FB_CSn FB_OEn FB_BE/BWEn FB_TA FB_TSIZ[1:0] Freescale Semiconductor, Inc. Table 22. Flexbus switching specifications FB1 FB5 Address FB4 FB2 Address Data AA=1 AA=0 FB4 ...
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... ADCx_DP3, and ADCx_DP3). The ADCx_DP2 and ADCx_DM2 ADC inputs are used 32 FB1 Address FB2 Address Data AA=1 AA=0 FB4 AA=1 AA=0 TSIZ Figure 11. FlexBus write timing diagram Table 23 K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010. Preliminary FB3 FB5 and Table 24 are achievable on the Freescale Semiconductor, Inc. Datasheet pdf - http://www.DataSheet4U.net/ ...
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... V Reference volt‐ REFL age low V Input voltage ADIN C Input capaci‐ ADIN tance R Input resistance ADIN Freescale Semiconductor, Inc. and Table 26. All other ADC channels meet the 13-bit Table 23. 16-bit ADC operating conditions Conditions Min. Absolute 1.71 Delta -100 DD DD ...
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... TBD MHz — TBD MHz — 8.0 MHz — 12.0 MHz — 5.0 MHz — 8.0 MHz — 2.5 MHz — 5.0 MHz Freescale Semiconductor, Inc. Notes Assumes Datasheet pdf - http://www.DataSheet4U.net/ ...
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... I Supply current DDA Supply current ADC asynchro‐ nous clock source f ADACK Sample Time Conversion Time See Reference Manual chapter for conversion times Freescale Semiconductor, Inc. AS ADIN AS 1 Min. Conditions • ADLPC=1, ADHSC=0 — • ADLPC=1, ADHSC=1 — • ADLPC=0, ADHSC=0 — ...
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... LSB ±4.0 — ±0.7 ±TBD ±0.7 ±TBD ±0.4 ±TBD ±0.4 ±TBD ±0.2 ±0.5 ±0.2 ±0.5 Freescale Semiconductor, Inc. Notes Max hard‐ ware aver‐ aging (AVGE = %1, AVGS = %11) Max hard‐ ware aver‐ aging (AVGE = %1, AVGS = %11) Max aver‐ aging ...
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... ENOB Effective number of bits Signal-to-noise SINAD plus distortion THD Total harmonic distortion SFDR Spurious free dy‐ namic range Freescale Semiconductor, Inc. REFH 1 Min. Conditions • 16 bit differential — • 16 bit single-ended — • 13 bit differential — • 12 bit single-ended — ...
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... TBD 16 TBD 128 TBD kΩ 64 TBD 32 TBD 100 — Ω — — µs Freescale Semiconductor, Inc. Notes I = leak‐ In age cur‐ rent (refer to the MCU's voltage and cur‐ rent oper‐ ating rat‐ ings) Notes 2, 3 IN+ to IN- ...
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... Offset drift over OFS temperature dG/dV Gain drift over DDA supply voltage Freescale Semiconductor, Inc. ), external to MCU, should be kept as minimum as possible. Increased kHz at 16-bit differential mode. Recommended ADC setting is: ADLSMP=1, ADLSTS Table 26. 16-bit ADC with PGA characteristics Conditions PGA disabled • ...
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... TBD 12.6 — bits TBD 11.8 — bits TBD 11.1 — bits TBD 10.2 — bits TBD 9.3 — bits 6.02 × ENOB + 1.76 dB Freescale Semiconductor, Inc. Notes I = leakage In current (refer to the MCU's voltage and current op‐ erating ratings) 4 Average=32 Average=32, f =100Hz in Average=32, f =100Hz in Datasheet pdf - http://www.DataSheet4U.net/ ...
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... DAC operating requirements Symbol Desciption V Supply voltage DDA V Reference voltage DACR T Temperature A Freescale Semiconductor, Inc. ) Table 28. 12-bit DAC operating requirements Table continues on the next page... K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010. Preliminary Peripheral operating requirements and behaviors Min. Typ. Max. 1.71 — ...
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... LSB — ±1 LSB — ±1 LSB — ±0.8 %FSR — ±0.6 %FSR 90 dB TBD — μV/C TBD — ppm of FSR/C — TBD μV/yr — 250 Ω Freescale Semiconductor, Inc. Notes 2 Notes Datasheet pdf - http://www.DataSheet4U.net/ ...
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... High power (SP • Low power (SP 1. Settling within ±1 LSB 2. The INL is measured for 0+100mV to VDACR−100 mV 3. The DNL is measured for 0+100 The DNL is measured for 0+100mV Calculated by a best fit curve from V Freescale Semiconductor, Inc. Min. ) 1 — ...
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... Table continues on the next page... K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010. Preliminary Min. Max. Unit 1.71 3.6 V −40 105 °C — 100 nF Typ. Max. Unit 1.2 TBD V — 1.24 V — — Freescale Semiconductor, Inc. Notes Notes See Fig‐ ure 15 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Table 33. VREF limited-range operating behaviors Symbol Description V Voltage reference output with factory trim out TBD TBD 6.7 Timers See General Switching 6.8 Communication interfaces Freescale Semiconductor, Inc. Min. — — — — — — 100 — –60 Figure 15. Typical output vs.temperature Figure 16. Typical output vs. VDD Specifications ...
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... TBD 0.8 — 2 100 150 14.25 — 24.8 0.25 TBD 0.4 Typ. Max. Unit — 5.5 V 120 — μA TBD — μA — 500 nA — 120 mA — TBD mA 3 3.3 3.6 V TBD TBD V — 3.6 V Freescale Semiconductor, Inc. Unit V V μA μA kΩ V Notes 1 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... DSPI_SIN to DSPI_SCK input setup DS8 DSPI_SCK to DSPI_SIN input hold 1. The DSPI module can operate across the entire operating voltage for the processor, but to run across the full voltage range the maximum frequency of operation is reduced. Freescale Semiconductor, Inc. Min. 1.76 185 Description K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010. ...
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... DS6 Last data Min. Max. 1.71 3.6 — 6. — BCLK (t / SCK SCK/2) — — 5 — 15 — — 15 — 15 DS9 DS16 DS11 Last data Data Last data Freescale Semiconductor, Inc. Unit V MHz Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Table 39. Slave Mode DSPI Timing (High-speed mode) Num Operating voltage Frequency of operation DS9 DSPI_SCK input cycle time DS10 DSPI_SCK input high/low time DS11 DSPI_SCK to DSPI_SOUT valid Freescale Semiconductor, Inc. Description DS3 DS2 DS8 DS7 Data First data DS5 First data Data Description Table continues on the next page ...
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... DS9 DS16 DS11 Last data Data Data Last data Min. Max. 0 400 400 7 — 7 — — 3 — 3 Freescale Semiconductor, Inc. Unit Unit kHz MHz MHz kHz Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Num Description Operating voltage S1 I2S_MCLK cycle time S2 I2S_MCLK pulse width high/low S3 I2S_BCLK cycle time S4 I2S_BCLK pulse width high/low Freescale Semiconductor, Inc. Description SDHC output delay (output valid) SDHC input setup time SDHC input hold time SD3 SD2 SD1 SD6 SD7 SD8 Figure 21 ...
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... Max. — 15 -2.5 — — — 20 — 0 — Min. Max. 2.7 3 — SYS 45% 55% 10 — 3 — — — 10 — 2 — Freescale Semiconductor, Inc. Unit S10 S8 Unit V ns MCLK period Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Slew enabled Port rise and fall time (low drive strength) • Slew disabled • Slew enabled 1. The greater synchronous and asynchronous timing must be met. 2. This is the shortest pulse that is guaranteed to be recognized. Freescale Semiconductor, Inc. S11 S12 S12 S15 S13 ...
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... TBD MHz 1 TBD pF 600 TBD mV 1 TBD μA 1 TBD μA TBD TBD % TBD TBD % TBD TBD % 0.326 600 fF 0.326 24 fF — 16 bits 30 — μs TBD — μA 1 TBD μA Freescale Semiconductor, Inc. Notes Datasheet pdf - http://www.DataSheet4U.net/ ...
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... USB0_DP USB0_DP 11 USB0_DM USB0_DM 12 VOUT33 VOUT33 13 VREGIN VREGIN 14 ADC0_DP1 ADC0_DP1 15 ADC0_DM1 ADC0_DM1 16 ADC1_DP1 ADC1_DP1 17 ADC1_DM1 ADC1_DM1 Freescale Semiconductor, Inc. www.freescale.com 98ASS23308W 98ARH98267A ALT1 ALT2 ALT3 PTE0 SPI1_PCS1 UART1_TX SDHC0_D1 PTE1 SPI1_SOUT UART1_RX SDHC0_D0 PTE2 SPI1_SCK UART1_CTS_ SDHC0_DCLK b PTE3 SPI1_SIN UART1_RTS_ SDHC0_CMD ...
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... K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010. Preliminary ALT4 ALT5 ALT6 ALT7 EWM_OUT_b EWM_IN RTC_CLKOUT USB_CLKIN JTAG_TCLK/ SWD_CLK JTAG_TDI JTAG_TDO/ TRACE_SWO JTAG_TMS/ SWD_DIO NMI_b CMP2_OUT I2S0_RX_BCL JTAG_TRST K I2S0_TXD FTM1_QD_PH A I2S0_TX_FS FTM1_QD_PH B I2S0_TX_BCL K Freescale Semiconductor, Inc. EzPort EZP_CLK EZP_DI EZP_DO EZP_CS_b Datasheet pdf - http://www.DataSheet4U.net/ ...
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... ADC0_SE14/ ADC0_SE14/ TSI0_CH13 TSI0_CH13 71 ADC0_SE15/ ADC0_SE15/ TSI0_CH14 TSI0_CH14 72 ADC0_SE4b/ ADC0_SE4b/ CMP1_IN0/ CMP1_IN0/ TSI0_CH15 TSI0_CH15 73 CMP1_IN1 CMP1_IN1 74 VSS VSS Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 PTA15 SPI0_SCK UART0_RX PTA16 SPI0_SOUT UART0_CTS_ b PTA17 SPI0_SIN UART0_RTS_ b PTA18 FTM0_FLT2 FTM_CLKIN0 PTA19 FTM1_FLT0 FTM_CLKIN1 PTB0 I2C0_SCL ...
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... FB_AD6 FTM2_FLT0 FB_AD5 FB_RW_b FB_AD27 FB_AD26 FB_AD25 FB_AD24 FB_CS5_b/ FB_TSIZ1/ FB_BE23_16_ BLS15_8_b FB_CS4_b/ FB_TSIZ0/ FB_BE31_24_ BLS7_0_b FB_TBST_b/ FB_CS2_b/ FB_BE15_8_B LS23_16_b FB_ALE/ FB_CS1_b/ FB_TS_b FB_CS0_b FB_AD4 FB_AD3 FB_AD2 EWM_IN FB_AD1 EWM_OUT_b FB_AD0 FTM0_FLT0 FTM0_FLT1 Freescale Semiconductor, Inc. EzPort Datasheet pdf - http://www.DataSheet4U.net/ ...
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... PTE0 PTE1 PTE2 PTE3 PTE4 PTE5 PTE6 VDD VSS USB0_DP USB0_DM VOUT33 VREGIN ADC0_DP1 ADC0_DM1 ADC1_DP1 ADC1_DM1 PGA0_DP/ADC0_DP0/ADC1_DP3 PGA0_DM/ADC0_DM0/ADC1_DM3 PGA1_DP/ADC1_DP0/ADC0_DP3 PGA1_DM/ADC1_DM0/ADC0_DM3 VDDA VREFH VREFL VSSA Freescale Semiconductor, Inc Figure 24 ...
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... Revision History 9 Revision History The following table provides a revision history for this document. Rev. No Table 45. Revision History Date Substantial Changes 11/2010 Initial public revision K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010. Preliminary Freescale Semiconductor, Inc. Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. ARM is the registered trademark of ARM Limited. ARM Cortex-M4 is the trademark of ARM Limited. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2010. All rights reserved. K20P104M100SF2 Rev. 1 11/2010 Datasheet pdf - http://www.DataSheet4U.net/ ...