TDA8752AH Philips Semiconductors, TDA8752AH Datasheet - Page 27

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TDA8752AH

Manufacturer Part Number
TDA8752AH
Description
Triple high-speed Analog-to-Digital Converter ADC
Manufacturer
Philips Semiconductors
Datasheet

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Philips Semiconductors
Notes
1. Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8000 acquisition points per equivalent
2. Output data acquisition is available after the maximum delay time t
3. The I
1999 Feb 24
handbook, full pagewidth
I
f
t
t
t
t
t
t
t
t
t
t
C
2
SCL
BUF
HD;STA
SU;STA
CKL
CKH
SU;DAT
HD;DAT
r
f
SU;STOP
SYMBOL
C-bus; see note 3
L(bus)
Triple high-speed Analog-to-Digital
Converter (ADC)
fundamental period. The calculation takes into account all harmonics and noise up to half clock frequency (NYQUIST
frequency). Conversion-to-noise ratio: S/N = EB
available. All the timings are given for a 10 pF capacitive load. A higher load can be used but the timing must then
be rechecked.
400 kbit/s (400 kHz).
2
C-bus timings are given for a frequency of 100 kbit/s (100 kHz). This bus can be used at a frequency of
clock frequency
time the bus must be free
before new transmission can
start
start condition hold time
start condition set-up time
LOW-level clock period
HIGH-level clock period
data set-up time
data hold time
SDA and SCL rise time
SDA and SCL fall time
stop condition set-up time
capacitive load for each bus
line
CKADCO
DATA
R0 to R7, ROR
G0 to G7, GOR
B0 to B7, BOR
V lN
PARAMETER
n
I n
t CPH
sample N
1
t d(s)
repeated start
for f
for f
Fig.11 Timing diagram.
SCL
SCL
sample N
I n
CONDITIONS
6.02 + 1.76 dB.
= 100 kHz
= 100 kHz
27
1
t CPL
I n
sample N
1
t d(o)
d(o)
t h(o)
, which is the time during which the data is
2
0
4.7
4.0
4.7
4.7
4.0
250
0
4.0
MIN.
I n
2
50 % = 1.4 V
TYP.
MGL103
2.4 V
1.4 V
0.4 V
Product specification
100
1.0
300
400
TDA8752A
MAX.
kHz
ns
ns
ns
pF
s
s
s
s
s
s
s
UNIT

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