TDA8752AH Philips Semiconductors, TDA8752AH Datasheet - Page 20

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TDA8752AH

Manufacturer Part Number
TDA8752AH
Description
Triple high-speed Analog-to-Digital Converter ADC
Manufacturer
Philips Semiconductors
Datasheet

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Philips Semiconductors
Table 8 Phase registers bits
The default programmed value is as follows:
I
Table 9 I
The I
Bits A2 and A1 are fixed by the potential on pins ADD1 and ADD2. Thus, four TDA8752As can be used on the same
system, using the addresses for ADD1 and ADD2 with the I
it is not possible to read the data in the register. The timing and protocol for the I
are available, see Tables 10 and 11.
Table 10 Address sequence for mode 0; note 1
Note
1. Where: S = START condition, ACK = acknowledge and P = STOP condition.
Table 11 Address sequence for mode 1; note 1
Note
1. Where: S = START condition, ACK = acknowledge and P = STOP condition.
1999 Feb 24
2
C-bus protocol
S
S
No external clock: CKA at logic 0
No use of the second clock: CKB at logic 0
Phase shift for CKAO and CKADCO = 0
Phase shift for CKBO = 0 .
Triple high-speed Analog-to-Digital
Converter (ADC)
Pa4 AND Pb4
2
A7
C-bus address of the circuit is 10011 xx0.
1
IC ADDRESS
IC ADDRESS
0
0
1
1
2
C-bus address
A6
0
Pa3 AND Pb3
ACK
ACK
0
0
1
1
SUBADDRESS
SUBADDRESS
REGISTER1
xxx1 1111
A5
0
Pa2 AND Pb2
0
0
1
1
A4
ACK
ACK
1
20
2
(see Table 1)
(see Table 1)
REGISTER1
REGISTER1
C-bus. The A0 bit must always be equal to logic 0 because
Pa1 AND Pb1
DATA
DATA
A3
1
0
0
1
1
ACK
ACK
ADD2
A2
2
C-bus are standard. Two sequences
Pa0 AND Pb0
SUBADDRESS
REGISTER2
REGISTER2
0
1
0
1
DATA
ADD1
A1
Product specification
TDA8752A
PHASE SHIFT ( )
ACK
ACK
348.75
11.25
337.5
0
to
to
A0
0
P
P

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