ISL6123 Intersil Corporation, ISL6123 Datasheet - Page 3

• Manufacturer Part Number: ISL6123
• Description: Power Sequencing Controllers
• Manufacturer: Intersil Corporation

Absolute Maximum Ratings
V
GATE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V
ISL6125 LOGIC OUT. . . . . . . . . . . . . . . . . . . . . -0.3V to V
UVLO, ENABLE, ENABLE#, SYSRST# . . . . . . -0.3V to V
DLY_ON, DLYOFF . . . . . . . . . . . . . . . . . . . . . . -0.3V to V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5kV (CDM)
Operating Conditions
V
Temperature Range (T
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
Electrical Specifications
UVLO
Undervoltage Lockout Threshold
Undervoltage Lockout Threshold Temp Co
Undervoltage Lockout Hysteresis
Undervoltage Lock out Threshold Range
Undervoltage Lock out Delay
Transient Filter Duration
DELAY ON / OFF
Delay Charging Current
Delay Charging Current Range
Delay Charging Current Temp. Coeff.
Delay Threshold Voltage
Delay Threshold Voltage Temp. Coeff.
ENABLE / ENABLE#, RESET# & SYSRST# I/O
ENABLE Threshold
ENABLE# Threshold
ENABLE / ENABLE# Hysteresis
ENABLE / ENABLE# Lock out Delay
RESET# Pull-Down Current
RESET# Delay after GATE High
RESET# Output Low
SYSRST# Low to GATE Turn-off
GATE
GATE Turn-On Current
GATE Turn-Off Current
GATE Turn-On/Off Current Temp. Coeff.
GATE Pull-Down High Current
GATE High Voltage
GATE Low Voltage
1. θ
2. For θ
3. All voltages are relative to GND, unless otherwise specified.
DD
DD
Supply Voltage Range . . . . . . . . . . . . . . . . . . . . +1.5V to +5.5V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6.0V
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
PARAMETER
A
) . . . . . . . . . . . . . . . . . . . . . . -40
3
V
DD
= 1.5V to +5V, T
TC_DLY_ichg
TC_DLY_Vth
DLY_ichg_r
TdelEN_LO
V
TC
RUVLOvth
T
I
TUVLOdel
TC_I
V
SYMBOL
V
DLY_ichg
I
GATEoff_h
DLY_Vth
GATEoff_l
ENh -
I
T
delSYS_G
V
V
UVLOhys
GATEon
UVLOvth
I
V
RSTpd
ISL6123, ISL6124, ISL6125
V
V
RSTdel
UVLOvth
GATEh
GATE_
TFIL
RSTl
ENh
ENh
GATE
V
o
ENl
A
C to 85
DD
DD
DD
= T
DD
+0.3V
+0.3V
+0.3V
J
+6V
T
T
V
V
DLY_ichg(max) - DLY_ichg(min)
Measured at V
RST = 0.1V
GATE = V
Measured at V
GATE = 80% of V
GATE = 0V
GATE = V
GATE = V
Gate High Voltage
Gate Low Voltage, V
= -40
Max V
ENABLE satisfied
UVLO satisfied
o
J
J
DD
DLY
C
= +25
= -40
, UVLO, ENABLE glitch filter
o
TEST CONDITIONS
= 0V
C - 85
UVLOvth
o
o
C to 85
C
DD
DD
DD
o
+5V
, Disabled
, UVLO = 0V
Thermal Information
Thermal Resistance (Typical, Notes 1, 2)
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . 150
Maximum Storage Temperature Range . . . . . . . . . -65
Maximum Lead Temperature (Soldering 10s) . . . . . . . . 300
C, Unless Otherwise Specified.
DD
DD
- Min V
4 x 4 QFN Package . . . . . . . . . . . . . . .
(QFN - Leads Only)
o
C
DD
= 1.5V
= 1V
+5V
DD
UVLOvth
= 1V
V
1.238
DD
-1.25
0.92
0.85
MIN
619
-
-
+5V
V
DD
V
1.266
TYP
0.08
633
160
0.2
0.2
1.2
DD
0.2
0.2
40
10
30
13
40
88
-1
7
9
1
9
1
+5.3V
0
/2
θ
JA
(
48
o
C/W) θ
1.294
0.001
MAX
-0.85
1.08
1.25
647
0.1
-
-
o
C to 150
JC
o
mV/
o
nV/
nA/
nA/
UNIT
(
C
C
mV
mV
mV
mA
mA
o
9
ms
ms
ms
µA
µA
µA
µA
µs
ns
V
V
V
V
V
V
V
C/W)
o
o
o
o
o
C
C
C
C
C