RTL8169S-32 ETC-unknow, RTL8169S-32 Datasheet - Page 11

• Manufacturer Part Number: RTL8169S-32
• Description: Single-chip Gigabit Nic Ethernet Controller
• Manufacturer: ETC-unknow

5.
The following signal type codes are used in the tables:
I: Input.
O: Output
T/S: Tri-State bi-directional input/output pin.
S/T/S: Sustained Tri-State.
O/D: Open Drain.
5.1. Power Management/Isolation
Integrated Gigabit Ethernet Controller (NIC)
Symbol
PMEB
(PME#)
ISOLATEB
(ISOLATE#)
LANWAKE
Pin Descriptions
Type
O/D
O
I
(128QFP)
Pin No
105
31
23
Table 1.
(233BGA)
Pin No
A13
P3
J1
Power Management/Isolation
Power Management Event. Open drain, active low.
Isolate Pin. Active low.
Description
Used to request a change in the current power management state
and/or to indicate that a power management event has occurred.
Used to isolate the RTL8169S from the PCI bus. The RTL8169S
will not drive its PCI outputs (excluding PME#) and will not sample
its PCI input (including PCIRSTB and PCICLK) as long as the
Isolate pin is asserted.
LAN WAKE-UP Signal (When CardB_En=0, bit2 Config3).
This signal is used to inform the motherboard to execute the
wake-up process. The motherboard must support Wake-On-LAN
(WOL). There are 4 choices of output that may be asserted from the
LANWAKE pin (active high, active low, positive pulse, and
negative pulse). We can configure the LANWAKE output via two
CONFIG bits: LWACT (Config1.4) and LWPTN (Config4.2).
The default output is an active high signal. Once a PME event is
received, the LANWAKE and PMEB assert at the same time if the
LWPME (bit4, CONFIG4) is set to 0. If the LWPME is set to 1, the
LANWAKE asserts only when PMEB asserts and ISOLATEB is
low.
LWAKE Output
LWPTN
5
0
1
Positive pulse
Active high
RTL8169S-32/RTL8169S-64
Track ID: JATR-1076-21
0
LWACT
Negative pulse
Active low
1
Datasheet
Rev. 1.7