BS2824 Holtek Semiconductor Inc., BS2824 Datasheet - Page 68

• Manufacturer Part Number: BS2824
• Description: Touch Key Mcu
• Manufacturer: Holtek Semiconductor Inc.

BS2824/BS2854/BS2868
Touch Key MCU
SCOM Function for LCD
Rev. 1.00
Timer/Event Counter Interrupt
Time Base Interrupt
Programming Considerations
LCD Operation
For a Timer/Event Counter interrupt to occur, the global interrupt enable bit, EMI, and the
corresponding timer interrupt enable bit, TnE, must first be set. An actual Timer/Event Counter
interrupt will take place when the Timer/Event Counter request flag, TnF, is set, a situation that will
occur when the relevant Timer/Event Counter overflows. When the interrupt is enabled, the stack is
not full and a Timer/Event Counter n overflow occurs, a subroutine call to the relevant timer
interrupt vector, will take place. When the interrupt is serviced, the timer interrupt request flag, TnF,
will be automatically reset and the EMI bit will be automatically cleared to disable other interrupts.
For a time base interrupt to occur the global interrupt enable bit EMI and the corresponding interrupt
enable bit TBE, must first be set. An actual Time Base interrupt will take place when the time base
request flag TBF is set, a situation that will occur when the Time Base overflows. When the interrupt
is enabled, the stack is not full and a time base overflow occurs a subroutine call to time base vector
will take place. When the interrupt is serviced, the time base interrupt flag. TBF will be
automatically reset and the EMI bit will be automatically cleared to disable other interrupts.
By disabling the interrupt enable bits, a requested interrupt can be prevented from being serviced,
however, once an interrupt request flag is set, it will remain in this condition in the interrupt register
until the corresponding interrupt is serviced or until the request flag is cleared by a software
instruction.
It is recommended that programs do not use the CALL subroutine instruction within the interrupt
subroutine. Interrupts often occur in an unpredictable manner or need to be serviced immediately in
some applications. If only one stack is left and the interrupt is not well controlled, the original
control sequence will be damaged once a CALL subroutine is executed in the interrupt subroutine.
All of these interrupts have the capability of waking up the processor when in the Idle/Sleep Mode.
Only the Program Counter is pushed onto the stack. If the contents of the register or status register
are altered by the interrupt service program, which may corrupt the desired control sequence, then
the contents should be saved in advance.
The devices have the capability of driving external LCD panels. The common pins for LCD driving, SCOM0~
SCOM3, are pin shared with certain pin on the PB0~ PB3 port.
generated using the application program.
An external LCD panel can be driven using this device by configuring the PB0~PB3 pins as
common pins and using other output ports lines as segment pins. The LCD driver function is
controlled using the SCOMC register which in addition to controlling the overall on/off function
also controls the bias voltage setup function. This enables the LCD COM driver to generate the
necessary V
The SCOMEN bit in the SCOMC register is the overall master control for the LCD Driver, however
this bit is used in conjunction with the COMnEN bits to select which Port B pins are used for LCD
driving. Note that the Port Control register does not need to first setup the pins as outputs to enable
the LCD driver operation.
DD
/2 voltage levels for LCD 1/2 bias operation.
68
The LCD signals (COM and SEG) are
January 27, 2010