BS2824 Holtek Semiconductor Inc., BS2824 Datasheet - Page 65

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BS2824

Manufacturer Part Number
BS2824
Description
Touch Key Mcu
Manufacturer
Holtek Semiconductor Inc.
Datasheet
Rev. 1.00
Interrupt Priority
External Interrupt
Interrupts, occurring in the interval between the rising edges of two consecutive T2 pulses, will be
serviced on the latter of the two T2 pulses, if the corresponding interrupts are enabled. In case of
simultaneous requests, the following table shows the priority that is applied. These can be masked
by resetting the EMI bit.
In cases where both external and internal interrupts are enabled and where an external and internal
interrupt occurs simultaneously, the external interrupt will always have priority and will therefore be
serviced first. Suitable masking of the individual interrupts using the interrupt registers can prevent
simultaneous occurrences.
For an external interrupt to occur, the global interrupt enable bit, EMI, and external interrupt enable
bit, INTE, must first be set. An actual external interrupt will take place when the external interrupt
request flag, INTF, is set, a situation that will occur when an edge transition appears on the external
INT line. The type of transition that will trigger an external interrupt, whether high to low, low to
high or both is determined by the INTEG0 and INTEG1 bits, which are bits 6 and 7 respectively, in
the CTRL1 control register. These two bits can also disable the external interrupt function.
The external interrupt pin is pin-shared with the I/O pin PA3 and can only be configured as an exter-
nal interrupt pin if the corresponding external interrupt enable bit in the INTC0 register has been set
and the edge trigger type has been selected using the CTRL1 register. The pin must also be setup as
an input by setting the corresponding PAC.3 bit in the port control register. When the interrupt is en-
abled, the stack is not full and a transition appears on the external interrupt pin, a subroutine call to
the external interrupt vector at location 04H, will take place. When the interrupt is serviced, the exter-
nal interrupt request flag, INTF, will be automatically reset and the EMI bit will be automatically
cleared to disable other interrupts. Note that any pull-high resistor connections on this pin will re-
main valid even if the pin is used as an external interrupt input.
Interrupt Source
External Interrupt
Timer/Event Counter 0 Overflow
Timer/Event Counter 1 Overflow
Interrupt Source
External Interrupt
Timer/Event Counter 0 Overflow
Timer/Event Counter 1 Overflow
Time Base Overflow
INTEG1
0
0
1
1
INTEG0
0
1
0
1
65
BS2824/BS2868
BS2824/BS2854/BS2868
BS2854
External interrupt disable
Rising edge Trigger
Falling edge Trigger
Both edge Trigger
Edge Trigger Type
Priority
Priority
1
2
3
1
2
3
4
Touch Key MCU
Vector
Vector
0CH
0CH
04H
08H
04H
08H
14H
January 27, 2010

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