BS2824 Holtek Semiconductor Inc., BS2824 Datasheet - Page 13

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BS2824

Manufacturer Part Number
BS2824
Description
Touch Key Mcu
Manufacturer
Holtek Semiconductor Inc.
Datasheet
System Architecture
Rev. 1.00
Clocking and Pipelining
A key factor in the high-performance features of the Holtek range of microcontrollers is attributed to
the internal system architecture. The range of devices take advantage of the usual features found
within RISC microcontrollers providing increased speed of operation and enhanced performance.
The pipelining scheme is implemented in such a way that instruction fetching and instruction
execution are overlapped, hence instructions are effectively executed in one cycle, with the
exception of branch or call instructions. An 8-bit wide ALU is used in practically all operations of
the instruction set. It carries out arithmetic operations, logic operations, rotation, increment,
decrement, branch decisions, etc. The internal data path is simplified by moving data through the
Accumulator and the ALU. Certain internal registers are implemented in the Data Memory and can
be directly or indirectly addressed. The simple addressing methods of these registers along with
additional architectural features ensure that a minimum of external components is required to
provide a functional I/O control system with maximum reliability and flexibility.
The main system clock, derived from either a Crystal/Resonator or RC oscillator is subdivided into
four internally generated non-overlapping clocks, T1~T4. The Program Counter is incremented at
the beginning of the T1 clock during which time a new instruction is fetched. The remaining T2~T4
clocks carry out the decoding and execution functions. In this way, one T1~T4 clock cycle forms one
instruction cycle. Although the fetching and execution of instructions takes place in consecutive
instruction cycles, the pipelining structure of the microcontroller ensures that instructions are
effectively executed in one instruction cycle. The exception to this are instructions where the
contents of the Program Counter are changed, such as subroutine calls or jumps, in which case the
instruction will take one more instruction cycle to execute.
For instructions involving branches, such as jump or call instructions, two instruction cycles are
required to complete instruction execution. An extra cycle is required as the program takes one cycle
to first obtain the actual jump or call address and then another cycle to actually execute the branch.
System Clocking and Pipelining
Instruction Fetching
13
BS2824/BS2854/BS2868
Touch Key MCU
January 27, 2010

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