PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 527

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

13.9
13.10 Setting Packet Mode of Operation Over POS-PHY L3
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
The FIFO size is set using the FIFO_BS[1:0] register bits in the TXSDQ FIFO Indirect
Configuration register and BT[4:0] is set in the TXSDQ FIFO Indirect Data and Buffer Available
Thresholds register. This constraint keeps the FIFO from entering a state where the TXSDQ
cannot sustain a new burst from the upstream device and the downstream TCFP block does not
have enough data to initiate a transfer.
For packet data streams, it is recommended that DT[7:0] be set to a value close to half or 2/3 of
the size of the FIFO. For ATM cell streams, DT[7:0] must be set to the value 0x3.
Setting ATM Mode of Operation over Utopia L3 or POS-PHY L3
ATM is the default operation mode for the S/UNI-2488. The following sequence of operation
should be used to prepare an ATM channel.
1. Input pin POSL3/UL3B must be tied to logic 1 to enable mixed-ATM/POS operation or to
2. Unprovision (disable) the TCFP, RCFP, RXSDQ, and TXSDQ blocks. The FIFO of the
3. Leave the TXSDQ and RXSDQ BT[4:0] and DT[7:0] values equal to their default values of 3
4. Set the POS_SEL register bits in the TCFP, RCFP, RXSDQ, and TXSDQ blocks to logic 0.
5. Optionally, reset the performance monitoring counters in all blocks by writing to the S/UNI-
The following sequence of operation should be used to prepare a channel for Packet operation
without affecting other channels.
1. Input pin POSL3/UL3B must be tied to logic 1 to enable the POS-PHY L3 system interface at
2. Unprovision (disable) the TCFP, RCFP, RXSDQ, and TXSDQ blocks. The FIFO will be
3. Set the POS_SEL register bits in the TCFP, RCFP, RXSDQ, and TXSDQ blocks to logic 1.
4. Set the RXSDQ Data Available threshold (DT[7:0]) values to the desired values. See Section
5. Enter the RXPHY BURST_SIZE[3:0]. See Section 13.8 for details.
logic 0 for pure ATM operation with Utopia Level 3 interface. The POS-PHY L3 interface
must be used for dual-mode operation. This must be set at power-up.
channel will be reset and emptied when unprovisioned.
respectively. See Sections 13.7 and 13.8 for details.
2488 Identity and Global Performance Monitor Update register. TIP remains high as the
performance monitoring registers are loaded, and is set to a logic zero when the transfer is
complete.
power-up.
reset and emptied when unprovisioned.
13.8 for details.
S/UNI-2488 Telecom Standard Product Datasheet
Released
527