PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 379

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
CRC_SEL[1:0]
POS_SEL
Table 13 Selection of the Number of Flag Bytes
The CRC select (CRC_SEL[1:0]) bits allow the control of the CRC calculation according to
the table below. For ATM cells, the CRC is calculated over the first four ATM header bytes.
For packet applications, the CRC is calculated over the whole packet data, before byte
stuffing and scrambling. For idle cells, the CRC-8 is always inserted and the coset
polynomial is added.
Table 14 CRC Mode Selection
The POS_SEL bit enables the POS HDLC frame processing mode. When POS_SEL is set to
logic 1, POS processing will occur. When POS_SEL is set to logic 0, ATM mode is selected.
FLAG[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
CRC_SEL[1:0]
00
01
10
11
Minimum Number of FLAG Bytes
1 flag
2 flags
4 flags
8 flags
16 flags
32 flags
64 flags
128 flags
256 flags
512 flags
1024 flags
2048 flags
4096 flags
8192 flags
16384 flags
32768 flags
HCS Operation
Reserved
Reserved
CRC-8 without coset polynomial
CRC-8 with coset polynomial added
S/UNI-2488 Telecom Standard Product Datasheet
FCS Operation
No FCS inserted
No FCS inserted
CRC-CCITT (2 bytes)
CRC-32 (4 bytes)
Released
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