DS28CN01 Maxim, DS28CN01 Datasheet - Page 5

• Manufacturer Part Number: DS28CN01
• Description: The DS28CN01 combines 1024 bits of EEPROM with challenge-and-response authentication security implemented with the Federal Information Publications (FIPS) 180-1/180-2 and ISO/IEC 10118-3 Secure Hash Algorithm (SHA-1)
• Manufacturer: Maxim

To be individually accessed, each device must have a
slave address that does not conflict with other devices
on the bus. The slave address to which the DS28CN01
responds is shown in Figure 1. The slave address is
part of the slave-address/direction byte. The upper 3
bits of the DS28CN01 slave address are set to 101b.
The AD0 pin controls address A0 and A1; AD1 controls
A2 and A3. AD0 and AD1 can be connected to GND,
Figure 1. Slave Address
MSB
A6
1
1Kb I
A5
0
7-BIT SLAVE ADDRESS
Slave Address/Direction Byte
_______________________________________________________________________________________
A4
1
AD_
SDA
V
SCL
CC
A3
2
ADDRESS/DIRECTION
4-LEVEL PIN STATES
AD1
ABRIDGED DATA SHEET
(SEE THE SLAVE
C/SMBus EEPROM with SHA-1 Engine
BYTE SECTION)
A2
A1
AD0
I
FUNCTION
2
CONTROL
C/SMBUS
A0
READ OR WRITE
DETERMINES
R/W
DS28CN01
MEMORY AND
SHA-1 ENGINE
COMPARATOR
8-BYTE WRITE
MAC OUTPUT
CONTROL
BUFFER
BUFFER
MAC
V
these four pin states to binary addresses. To be select-
ed, the device must be addressed with A0 to A3 match-
ing the binary address of the respective pins.
The last bit of the slave-address/direction byte (R/W)
defines the data direction. When set to a 0, subsequent
data flows from master to slave (write-access mode);
when set to a 1, data flows from slave to master (read-
access mode).
Table 1. Pin State to Binary Translation
CC
GND
AD1
SDA
V
SCL
CC
, SCL, or SDA. Table 1 shows the translation of
A3
0
0
1
1
64-BIT UNIQUE
USER EEPROM
OF 32 BYTES
REGISTER
MEMORY
NUMBER
4 PAGES
SECRET
ENGINE
SHA-1
PAGE
A2
0
1
0
1
Block Diagram
GND
AD0
SCL
SDA
V
CC
A1
0
0
1
1
A0
0
1
0
1
5