DS28CN01 Maxim, DS28CN01 Datasheet - Page 3

• Manufacturer Part Number: DS28CN01
• Description: The DS28CN01 combines 1024 bits of EEPROM with challenge-and-response authentication security implemented with the Federal Information Publications (FIPS) 180-1/180-2 and ISO/IEC 10118-3 Secure Hash Algorithm (SHA-1)
• Manufacturer: Maxim

ELECTRICAL CHARACTERISTICS (continued)
(T
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
Note 10: See Figure 3.
Note 11: C
Output Fall Time from V
V
from 10pF to 400pF (Notes 2, 11)
Pulse Width of Spikes that are
Suppressed by the Input Filter
Input Current with an Input
Voltage Between 0.1V
0.9V
Input Capacitance
SCL Clock Frequency
Bus Timeout
Hold-Time (Repeated) START
Condition; After this Period, the
First Clock Pulse is Generated
Low Period of the SCL Clock
(Note 14)
High Period of the SCL Clock
Setup Time for a Repeated
START Condition
Data Hold Time (Notes 15, 16)
Data Setup Time
Setup Time for STOP Condition
Bus Free Time Between a STOP
and START Condition
Capacitive Load for Each Bus
Line
A
IL(MAX)
= -40°C to +85°C.) (Note 1)
CCMAX
with a Bus Capacitance
PARAMETER
Specifications at -40°C are guaranteed by design and characterization only and not production tested.
Guaranteed by design, characterization, and/or simulation only and not production tested.
This specification is valid for each 8-byte memory row.
Write-cycle endurance is degraded as T
Not 100% production tested; guaranteed by reliability monitor sampling.
Data retention is degraded as T
Guaranteed by 100% production test at elevated temperature for a shorter time; equivalence of this production test to data
sheet limit at operating temperature range is established by reliability testing.
EEPROM writes can become nonfunctional after the data retention time is exceeded. Long-time storage at elevated tem-
peratures is not recommended; the device can lose its write capability after 10 years at +125°C or 40 years at +85°C.
All values are referred to V
Bus Specification v2.1 are allowed.
1Kb I
B
= Total capacitance of one bus line in pF. If mixed with high-speed-mode devices, faster fall times according to I
_______________________________________________________________________________________
CC
IH(MIN)
and
2
ABRIDGED DATA SHEET
C/SMBus EEPROM with SHA-1 Engine
to
IH(MIN)
SYMBOL
t
TIMEOUT
t
t
t
t
t
HD:STA
SU:STA
HD:DAT
SU:DAT
SU:STO
t
t
f
HIGH
t
LOW
t
t
SCL
BUF
C
C
OF
SP
I
A
I
B
I
increases.
and V
V
V
(Note 2)
(Note 12)
(Note 2)
(Note 13)
CM bit = 1 (Note 13)
(Note 14)
V
V
V
(Note 14)
(Note 14)
V
V
V
(Notes 2, 14, 17)
(Note 14)
(Note 14)
(Notes 2, 14)
IL(MAX)
A
CC
CC
CC
CC
CC
CC
CC
CC
increases.
< 2.0V
< 2.0V
< 2.0V
2.0V
2.7V
2.0V
2.7V
2.0V
levels.
CONDITIONS
0.1C
0.1C
20 +
20 +
MIN
100
-10
0.6
1.3
1.5
1.9
0.6
0.6
0.3
0.3
0.3
0.6
1.3
25
B
B
TYP
MAX
+10
250
300
400
400
0.9
1.1
1.5
50
10
75
UNITS
kHz
2
μA
ms
ns
ns
pF
μs
μs
μs
μs
μs
ns
μs
μs
pF
C
3