LPC1820FET100 NXP Semiconductors, LPC1820FET100 Datasheet - Page 36

• Manufacturer Part Number: LPC1820FET100
• Description: The LPC1820FET100 is a high-performance, cost-effective Cortex-M3 microcontroller featuring 168 kB of SRAM, and advanced peripherals including High Speed USB 2
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 3.
LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See
LPC1850_30_20_10
Preliminary data sheet
Symbol
P8_5
P8_6
P8_7
P8_8
Pin description
J1
K3
K1
L1
x
x
x
x
…continued
-
-
-
-
40
43
45
49
All information provided in this document is subject to legal disclaimers.
-
-
-
-
Rev. 3.1 — 15 December 2011
-
-
-
-
[3]
[3]
[3]
[3]
I; PU I/O GPIO4[5] — General purpose digital input/output pin.
I; PU I/O GPIO4[6] — General purpose digital input/output pin.
I; PU I/O GPIO4[7] — General purpose digital input/output pin.
I; PU -
I/O USB1_ULPI_D0 — ULPI link bidirectional data line
-
O
O
-
-
I
I
-
O
O
-
-
I
O
-
O
O
-
-
I
I
-
-
-
-
O
O
Description
0.
R — Function reserved.
LCD_VD6 — LCD data.
LCD_VD8 — LCD data.
R — Function reserved.
R — Function reserved.
T0_CAP1 — Capture input 1 of timer 0.
USB1_ULPI_NXT — ULPI link NXT signal. Data flow
control signal from the PHY.
R — Function reserved.
LCD_VD5 — LCD data.
LCD_LP — Line synchronization pulse (STN).
Horizontal synchronization pulse (TFT).
R — Function reserved.
R — Function reserved.
T0_CAP2 — Capture input 2 of timer 0.
USB1_ULPI_STP — ULPI link STP signal. Asserted
to end or interrupt transfers to the PHY.
R — Function reserved.
LCD_VD4 — LCD data.
LCD_PWR — LCD panel power enable.
R — Function reserved.
R — Function reserved.
T0_CAP3 — Capture input 3 of timer 0.
R — Function reserved.
USB1_ULPI_CLK — ULPI link CLK signal. 60 MHz
clock generated by the PHY.
R — Function reserved.
R — Function reserved.
R — Function reserved.
R — Function reserved.
CGU_OUT0 — CGU spare clock output 0.
I2S1_TX_MCLK — I
Table
32-bit ARM Cortex-M3 microcontroller
LPC1850/30/20/10
2.
2
S1 transmit master clock.
© NXP B.V. 2011. All rights reserved.
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