LPC1820FET100 NXP Semiconductors, LPC1820FET100 Datasheet - Page 17
LPC1820FET100
Manufacturer Part Number
LPC1820FET100
Description
The LPC1820FET100 is a high-performance, cost-effective Cortex-M3 microcontroller featuring 168 kB of SRAM, and advanced peripherals including High Speed USB 2
Manufacturer
NXP Semiconductors
Datasheet
1.LPC1810FBD144.pdf
(157 pages)
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Table 3.
LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See
LPC1850_30_20_10
Preliminary data sheet
Symbol
P2_6
P2_7
P2_8
Pin description
K16
H14
J16
x
x
x
…continued
G9
C10 138 96
C6
137 95
140 98
All information provided in this document is subject to legal disclaimers.
Rev. 3.1 — 15 December 2011
64
65
67
[3]
[3]
[3]
I; PU -
I; PU I/O GPIO0[7] — General purpose digital input/output pin.
I; PU -
I/O U0_DIR — RS-485/EIA-485 output enable/direction
I/O EMC_A10 — External memory address line 10.
O
I/O GPIO5[6] — General purpose digital input/output pin.
I
I
-
O
I/O U3_UCLK — Serial clock input/output for USART3 in
I/O EMC_A9 — External memory address line 9.
-
-
O
-
O
I/O U3_DIR — RS-485/EIA-485 output enable/direction
I/O EMC_A8 — External memory address line 8.
I/O GPIO5[7] — General purpose digital input/output pin.
-
-
-
Description
R — Function reserved.
control for USART0.
USB0_IND0 — USB0 port indicator LED control
output 0.
CTIN_7 — SCT input 7.
T3_CAP3 — Capture input 3 of timer 3.
R — Function reserved.
ISP entry pin. If this pin is pulled LOW at reset, the
part enters ISP mode using USART0.
CTOUT_1 — SCT output 1. Match output 1 of
timer 0.
synchronous mode.
R — Function reserved.
R — Function reserved.
T3_MAT3 — Match output 3 of timer 3.
R — Function reserved.
R — Function reserved. Boot pin (see
CTOUT_0 — SCT output 0. Match output 0 of
timer 0.
control for USART3.
R — Function reserved.
R — Function reserved.
R — Function reserved.
Table
32-bit ARM Cortex-M3 microcontroller
LPC1850/30/20/10
2.
© NXP B.V. 2011. All rights reserved.
Table
5)
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