LPC1820FET100 NXP Semiconductors, LPC1820FET100 Datasheet - Page 13
LPC1820FET100
Manufacturer Part Number
LPC1820FET100
Description
The LPC1820FET100 is a high-performance, cost-effective Cortex-M3 microcontroller featuring 168 kB of SRAM, and advanced peripherals including High Speed USB 2
Manufacturer
NXP Semiconductors
Datasheet
1.LPC1810FBD144.pdf
(157 pages)
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Table 3.
LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See
LPC1850_30_20_10
Preliminary data sheet
Symbol
P1_14
P1_15
P1_16
P1_17
Pin description
R11
T12
M7
M8
x
x
x
x
…continued
J8
K8
H9
H10 93
85
87
90
All information provided in this document is subject to legal disclaimers.
61
62
64
66
Rev. 3.1 — 15 December 2011
42
43
44
45
[3]
[3]
[3]
[4]
I; PU I/O GPIO1[7] — General purpose digital input/output pin.
I; PU I/O GPIO0[2] — General purpose digital input/output pin.
I; PU I/O GPIO0[3] — General purpose digital input/output pin.
I; PU I/O GPIO0[12] — General purpose digital input/output
I
-
I/O EMC_D7 — External memory data line 7.
O
-
-
-
O
-
I
O
-
-
-
I
-
I
O
-
-
I
I/O U2_UCLK — Serial clock input/output for USART2 in
-
I/O ENET_MDIO — Ethernet MIIM data input and output.
I
O
-
-
Description
U1_RXD — Receiver input for UART1.
R — Function reserved.
T0_MAT2 — Match output 2 of timer 0.
R — Function reserved.
R — Function reserved.
R — Function reserved.
U2_TXD — Transmitter output for USART2.
R — Function reserved.
ENET_RXD0 — Ethernet receive data 0 (RMII/MII
interface).
T0_MAT1 — Match output 1 of timer 0.
R — Function reserved.
R — Function reserved.
R — Function reserved.
U2_RXD — Receiver input for USART2.
R — Function reserved.
ENET_CRS — Ethernet Carrier Sense (MII
interface).
T0_MAT0 — Match output 0 of timer 0.
R — Function reserved.
R — Function reserved.
ENET_RX_DV — Ethernet Receive Data Valid
(RMII/MII interface).
pin.
synchronous mode.
R — Function reserved.
T0_CAP3 — Capture input 3 of timer 0.
CAN1_TD — CAN1 transmitter output.
R — Function reserved.
R — Function reserved.
Table
32-bit ARM Cortex-M3 microcontroller
LPC1850/30/20/10
2.
© NXP B.V. 2011. All rights reserved.
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