AD5361 Analog Devices, AD5361 Datasheet - Page 10

• Manufacturer Part Number: AD5361
• Description: 16-Channel, 14-Bit, Serial Input, Voltage-Output DAC
• Manufacturer: Analog Devices

Specifications of AD5361

• Resolution (bits): 14bit
• Dac Update Rate: 540kSPS
• Dac Settling Time: 20µs
• Max Pos Supply (v): +16.5V
• Single-supply: No
• Dac Type: Voltage Out
• Dac Input Format: Ser,SPI

AD5360/AD5361
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 5. LQFP Pin Function Descriptions
LQFP
1
2
3
4
5
6
7
8, 32
9, 10, 14, 24, 25,
26, 27, 30
11, 28
12, 29
13
19
31
33
34 to 37, 39 to
42, 15 to 18, 20
to 23
NC = NO CONNECT
BIN/2SCOMP
MON_OUT
MON_IN0
RESET
VREF1
LDAC
BUSY
GPIO
CLR
V
V
Pin No.
NC
NC
DD
SS
Figure 7. 52-Lead LQFP Pin Configuration
10
11
12
13
1
2
3
4
5
6
7
8
9
LFCSP
55
56
1
2
3
4
5
6, 34
7 to 11, 15, 16,
26 to 28, 31, 32
12, 29
13, 30
14
21
33
35
36 to 39, 41 to
44, 17 to 20, 22
to 25
14 15 16 17 18 19 20 21 22 23 24 25 26
52 51 50 49 48
PIN 1
INDICATOR
(Not to Scale)
AD5360/
AD5361
TOP VIEW
47 46 45 44
Mnemonic
LDAC
CLR
RESET
BIN/2SCOMP
BUSY
GPIO
MON_OUT
MON_IN0, MON_IN1
NC
V
V
VREF1
SIGGND1
VREF0
TEMP_OUT
VOUT0 to VOUT15
DD
SS
43 42 41 40
39
38
37
36
35
34
33
32
31
30
29
28
27
VOUT4
SIGGND0
VOUT3
VOUT2
VOUT1
VOUT0
TEMP_OUT
MON_IN1
VREF0
NC
V
V
NC
SS
DD
Rev. A | Page 10 of 28
Load DAC Logic Input (Active Low). See the BUSY and LDAC Functions
section for more information.
Asynchronous Clear Input (Level Sensitive, Active Low). See the Clear
Function section for more information.
Digital Reset Input.
Data Format Digital Input. Connecting this pin to DGND selects offset binary.
Connecting this pin to logic 1 selects twos complement. This input has a weak
pull-down.
Digital Input/Open-Drain Output. BUSY is open drain when it is an output.
See the BUSY and LDAC Functions section for more information.
Digital I/O Pin. This pin can be configured as an input or output that can be
read or programmed high or low via the serial interface. When configured as
an input, it has a weak pull-down.
Analog Multiplexer Output. Any DAC output, the MON_IN0 input, or the
MON_IN1 input can be switched to this output.
Analog Multiplexer Inputs. Can be switched to MON_OUT.
No Connect.
Positive Analog Power Supply; +9 V to +16.5 V for specified performance.
These pins should be decoupled with 0.1 μF ceramic capacitors and 10 μF
capacitors.
Negative Analog Power Supply; −16.5 V to −8 V for specified performance.
These pins should be decoupled with 0.1 μF ceramic capacitors and 10 μF
capacitors.
Reference Input for DAC 8 to DAC 15. This voltage is referred to AGND.
Reference Ground for DAC 8 to DAC 15. VOUT8 to VOUT15 are referenced to
this voltage.
Reference Input for DAC 0 to DAC 7. This voltage is referred to AGND.
Provides an output voltage proportional to chip temperature. This is typically
1.46 V at 25°C with an output variation of 4.4 mV/°C.
DAC Outputs. Buffered analog outputs for each of the 16 DAC channels. Each
analog output is capable of driving an output load of 10 kΩ to ground.
Typical output impedance of these amplifiers is 0.5 Ω.
Description
NC = NO CONNECT
BIN/2SCOMP
MON_OUT
MON_IN0
RESET
VREF1
BUSY
GPIO
V
V
NC
NC
NC
NC
NC
DD
SS
Figure 8. 56-Lead LFCSP Pin Configuration
10
11
12
13
14
1
2
3
4
5
6
7
8
9
PIN 1
INDICATOR
(Not to Scale)
AD5360/
AD5361
TOP VIEW
42
41
40
39
38
37
36
35
34
33
32
31
30
29
VOUT5
VOUT4
SIGGND0
VOUT3
VOUT2
VOUT1
VOUT0
TEMP_OUT
MON_IN1
VREF0
NC
NC
V
V
SS
DD