AD7799 Analog Devices, AD7799 Datasheet - Page 13

• Manufacturer Part Number: AD7799
• Description: 3-Channel, Low Noise, Low Power, 24-Bit, Sigma Delta ADC with On-Chip In-Amp
• Manufacturer: Analog Devices

Specifications of AD7799

• Resolution (bits): 24bit
• # Chan: 3
• Sample Rate: n/a
• Interface: Ser,SPI
• Analog Input Type: Diff-Uni
• Ain Range: (2Vref/PGA Gain) p-p
• Adc Architecture: Sigma-Delta
• Pkg Type: SOP

ON-CHIP REGISTERS
The ADC is controlled and configured via a number of on-chip registers, which are described on the following pages. In the following
descriptions, set implies a Logic 1 state and cleared implies a Logic 0 state, unless otherwise stated.
COMMUNICATION REGISTER
RS2, RS1, RS0 = 0, 0, 0
The communication register is an 8-bit, write-only register. All communication to the part must start with a write operation to the
communication register. The data written to the communication register determines whether the next operation is a read or write
operation, and to which register this operation takes place. After the read or write operation is complete, the interface returns to its
default state, where it expects a write operation to the communication register. In situations where the interface sequence is lost, a write
operation of at least 32 serial clock cycles with DIN high returns the ADC to this default state by resetting the entire part. Table 9 outlines
the bit designations for the communication register. CR0 through CR7 indicate the bit location, with CR denoting that the bits are in the
communication register. CR7 denotes the first bit of the data stream. The number in parentheses indicates the power-on/reset default
status of that bit.
CR7
WEN(0)
Table 9. Communication Register Bit Designations
Bit Location
CR7
CR6
CR5 to CR3
CR2
CR1 to CR0
Table 10. Register Selection
RS2
0
0
0
0
0
1
1
1
1
RS1
0
0
0
1
1
0
0
1
1
CR6
R/W(0)
RS0
0
0
1
0
1
0
1
0
1
Bit Name
WEN
R/W
RS2 to RS0
CREAD
0
Register
Communication register during a write operation
Status register during a read operation
Mode register
Configuration register
Data register
ID register
IO register
Offset register
Full-scale register
CR5
RS2(0)
Description
Write Enable Bit. A 0 must be written to this bit so that the write to the communication register occurs.
If a 1 is the first bit written, the part does not clock subsequent bits into the register. It stays at this bit
location until a 0 is written to this bit. Once a 0 is written to the WEN bit, the next seven bits are loaded
to the communication register.
Read/Write Bit. A 0 in this bit location indicates that the next operation is a write to a specified register.
A 1 in this position indicates that the next operation is a read from the designated register.
Register Address Bits. These bits are used to select the register during the serial interface communication.
See Table 10.
Continuous Read of the Data Register Bit. When this bit is set to 1 and the data register is selected, the
serial interface is configured so that the data register can be continuously read, that is, the contents of
the data register are placed on the DOUT pin automatically when the SCLK pulses are applied after the
RDY pin goes low to indicate that a conversion is complete. The communication register does not have
to be written to for data reads. To enable continuous read mode, the instruction 01011100 must be
written to the communication register. To exit the continuous read mode, the instruction 01011000
must be written to the communication register while the RDY pin is low. While in continuous read mode,
the ADC monitors activity on the DIN line for the instruction to exit continuous read mode. Additionally,
a reset occurs if 32 consecutive 1s are seen on DIN. Therefore, DIN should be held low in continuous read
mode until an instruction is to be written to the device.
These bits must be programmed to Logic 0 for correct operation.
CR4
RS1(0)
Rev. A | Page 13 of 28
CR3
RS0(0)
CR2
CREAD(0)
Register Size
8 bits
8 bits
16 bits
16 bits
16 bits (AD7798)/24 bits (AD7799)
8 bits
8 bits
16 bits (AD7798)/24 bits (AD7799)
16 bits (AD7798)/24 bits (AD7799)
CR1
0(0)
AD7798/AD7799
CR0
0(0)